Sk Chen Email & Phone Number

Milpitas, Ca, Us

Manager Apple Component Memory Product Line - Memory test, System Test;Manager RMA EFA team for internal quality monitoring failure analysis and customer return as well;Manager Early Involvement Team who are working with product design team for issues from product & testing area;

Cambridge, England, Gb

Oversee & support on SOC products from Shanghai design center of CSR.Work with global team (internal & external) for 65nm, 40nm CSR’s SOC products. Set up engineering capacity in Shanghai for supporting SOC products from operation point of view.Focus on:>Product characterization/validation; Qualification; New silicon debugging; Platform correlation; safe launch for production ramp; Capacity improvement, yield & DPPM improvement.>Interact with appropriate functional teams (design, fab, manufacturing, assembly, quality, reliability, marketing, sales, etc.) to execute goals.

Irvine, Ca, Us

Support multiple product lines across different technologies from 2 Business Units (Broadband Access, and Imaging PC & Media) for the whole product life cycle;Handle production issues (Yield / Capacity / Quality / Non-Confirm-Material / Customer Return)Yield & Quality & throughput improvement & Gross Margin improvement, cost reduction.New Product Introduction (Characterization / Qualification / Yield ramp-up / manufacturing readiness).

Mainly focus on 0.25 & 0.18 Flash products (embeded and standalone).Low Yield analysis, Failure analysis, improve Fab WAT Cpk, inline/WAT control for yield improvement, tool commonality analysis, DOE for process improvement & test monitoring, improve earlier WAT monitoring for Flash probe low yield, etc.

Pudong New Area, Shanghai, Cn

Support 0.16um SDRAM in two fabs, work on 90nm products.Focus on yield, failure analysis, inline, WAT issue & engineering test evaluation, etc.