Smit Kansara Email & Phone Number

Hi there! I'm a soon-to-be Electrical and Computer Engineering graduate from Dharmsinh Desai University . My focus is on Digital Electronics and Verilog.Skills:- Digital Electronics- VerilogProjects:1. RAM in Verilog: Built a RAM design using Verilog, turning theory into practice.2. FIFO in Verilog: Developed a FIFO system using Verilog, showcasing my digital circuit design skills.3. Line Follower CarGoal:I'm excited about VLSI and Verification Engineering. I'm looking for opportunities to apply my skills in these areas, contributing to cutting-edge semiconductor design.

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  Dharmsinh Desai University