Skilled in Design &Implementation and Physical Design, Sign-off Analysis and scripting languages like TCL ,Python,shell.Strong information technology professional graduated from Motilal Nehru National Institute Of Technology. Role:Currently working as design and implementation engineer. Key responsibility:1:Synthesis(dc,dcg,fc,genus) 2:CLP3:FV4:STAPast Role:Worked as physical Design intern in QualcommKey responsibility from floorplanning to sign off analysis.1: Full-Chip from netlist to GDS. Develops solutions for physical convergence of blocks.2: Implement floor-planning, block-level subsystem partitioning and budgeting. Power grid, signal track definitions, power planning. 3: Done placement&routing with clock tree analysis. And timing convergence with Tcl scripting, with cross talk and AOCV/POCV.4: Done sign-off analysis with prime time (timing sign-off), calibre (physical verification sign off).5: Done Tcl scripting for timing convergence.