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Sreedevi Nair Email & Phone Number

DFT Design Engineer at Intel Corporation
Location: Austin, Texas, United States 10 work roles 2 schools
1 work email found @intel.com LinkedIn matched
✓ Verified May 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email

Work email s****@intel.com
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Current company
Intel Corporation
Role
DFT Design Engineer
Location
Austin, Texas, United States
Company size
114813 employees

Who is Sreedevi Nair? Overview

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Quick answer

Sreedevi Nair is listed as DFT Design Engineer at Intel Corporation, a company with 114813 employees, based in Austin, Texas, United States. AeroLeads shows a work email signal at intel.com and a matched LinkedIn profile for Sreedevi Nair.

Sreedevi Nair previously worked as Sr.PDE Engineer at Intel Corporation and DFT Design Engineer at Freescale Semiconductor. Sreedevi Nair holds Mse, Vlsi Design from The University Of Texas At Austin.

Company email context

Email format at Intel Corporation

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{first}.{last}@intel.com
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Profile bio

About Sreedevi Nair

Electrical engineering professional specialized in CMOS VLSI design and experienced in design for testing with over 17 years experience.Specialties: Mentor Fastscan and BSDarchitect Good knowledge of Design for test methodology Cadence DFT and synthesis tools DRC and fault coverage analysisSynopsys DFT and synthesis tools Atpg pattern creation and verification

Listed skills include Dft, Cmos, Vlsi, Testing, and 24 others.

Current workplace

Sreedevi Nair's current company

Company context helps verify the profile and gives searchers a useful next step.

Intel Corporation
Intel Corporation
DFT Design Engineer
Austin, TX, US
Website
intel.com
Employees
114813
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Company profile
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10 roles

Sreedevi Nair work experience

A career timeline built from the work history available for this profile.

Dft Design Engineer

Current
Intel Corporation

Santa Clara, California, US

Nov 2021 - Present

Sr.Pde Engineer

Intel Corporation

Santa Clara, California, US

Generated, developed and improved scan content for server CPU products. This included pre-silicon validation as well as post-silicon bring-up on the tester.

May 2015 - Jan 2022

Dft Engineer

Intel Corporation

Santa Clara, California, US

Worked with the TNG DFX team on DFX validation and DFT runs for South complex IP's.

May 2012 - May 2013

Dft Engineer

Amd

Worked on pre silicon debug and bring up of scan patterns using TSSI’s virtual tester for the Sapphire and Verigy tester environments.

Mar 2010 - May 2012

Sr.Staff Engineer

Freescale Semiconductor

Austin, Texas, US

Worked in the DFT methodology group.Worked with the DFT group of Power PC core development and specifically on custom memories using 45 nm library.

Aug 2004 - Nov 2008

Dft Engineer

Freescale Semiconductor

Austin, Texas, US

DFT Applications engineer for the Tools and Methodology group.

Aug 2001 - Aug 2004

Design Engineer

Cirrus Logic

Austin, TX, US

Team lead for design for scan insertion and testing for EP 9312.

Aug 1999 - Jul 2001
Team & coworkers

Colleagues at Intel Corporation

Other employees you can reach at intel.com. View company contacts for 114813 employees →

TS Tai Shawn Burt Tai Shawn Burt Colleague at Intel Corporation Los Angeles Metropolitan Area, United States View → TE Tashia Economopoulos Tashia Economopoulos Colleague at Intel Corporation Scottsdale, Arizona, United States, United States View → RT Rhonda Thompson Rhonda Thompson Colleague at Intel Corporation Laveen, Arizona, United States, United States View → SZ Shah Zaib Shah Zaib Colleague at Intel Corporation Multan, Punjab, Pakistan, Pakistan View → PB Priya Balasubramanian Priya Balasubramanian Colleague at Intel Corporation Hillsboro, Oregon, United States, United States View → VK Valentin Kalashnik Valentin Kalashnik Colleague at Intel Corporation Israel, Israel View → AW Anthony Wong Anthony Wong Colleague at Intel Corporation Penang, Malaysia, Malaysia View → PT Paul Taylor Paul Taylor Colleague at Intel Corporation Ireland, Ireland View → PJ Prem Jetti Prem Jetti Colleague at Intel Corporation Vijayawada, Andhra Pradesh, India, India View → JS Jitender Saini Jitender Saini Colleague at Intel Corporation Bengaluru, Karnataka, India, India View →
2 education records

Sreedevi Nair education

Mse, Vlsi Design

The University Of Texas At Austin

B Tech, Electronics Engineering

National Institute Of Technology Calicut
FAQ

Frequently asked questions about Sreedevi Nair

Quick answers generated from the profile data available on this page.

What company does Sreedevi Nair work for?

Sreedevi Nair works for Intel Corporation.

What is Sreedevi Nair's role at Intel Corporation?

Sreedevi Nair is listed as DFT Design Engineer at Intel Corporation.

What is Sreedevi Nair's email address?

AeroLeads has found 1 work email signal at @intel.com for Sreedevi Nair at Intel Corporation.

Where is Sreedevi Nair based?

Sreedevi Nair is based in Austin, Texas, United States while working with Intel Corporation.

What companies has Sreedevi Nair worked for?

Sreedevi Nair has worked for Intel Corporation, Freescale Semiconductor, Amd, and Cirrus Logic.

Who are Sreedevi Nair's colleagues at Intel Corporation?

Sreedevi Nair's colleagues at Intel Corporation include Tai Shawn Burt, Tashia Economopoulos, Rhonda Thompson, Shah Zaib, and Priya Balasubramanian.

How can I contact Sreedevi Nair?

You can use AeroLeads to view verified contact signals for Sreedevi Nair at Intel Corporation, including work email, phone, and LinkedIn data when available.

What schools did Sreedevi Nair attend?

Sreedevi Nair holds Mse, Vlsi Design from The University Of Texas At Austin.

What skills is Sreedevi Nair known for?

Sreedevi Nair is listed with skills including Dft, Cmos, Vlsi, Testing, Atpg, Functional Verification, Soc, and Asic.

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