- Concept, Market/Competitive/Performance analysis, architecture for LLM on FPGA. oneAPI implementation of the same.- GNN accelerator architecture for web-scale graphs.

Enabling AI in Healthcare

Computer vision solutions for face analytics (recognition, age/gender/emotion classification, de-identification) and tracking. Detection and tracking algorithms enables various kinds of object counting in videos.

- Developed Architecture, Micro-architecture and lead team for deep learning solutions, computer vision(CNN, GEMM in particular)- Architecture analysis of various CNN digital IPs to integrate into Intel SOC- Developed Architecture for Natural Language Processing (NLP) for Intel server-FPGA.- Part of an architecture team to develop a Machine Learning Engine- Algorithms and POC for edge learning in Computer Vision and NLP clients- Path Finding and algorithms for Genomics. Acceleration of PairHMM algorithm in the GATK pipeline.

Micro-architect and design lead of the MIPI Unipro (Phy layer in particular)Micro-architecture and design of a CNN (Convolutional Neural Network) IP

Prototyping and Validation of Cypress's Generation 4 Touch screen solution on FPGA. Responsible for porting digital IPs to FPGA, including creating models for those that cannot be ported directly onto the FPGA. A test-chip that interfaced to the touch screen, along with the FPGA was used to validate firmware and the digital design itself.

Managed a team for H.264 high definition video encode. Responsible for Encoder architecture and RTL design/implementation of Intra mode decision. Also responsible for a C++ reference model for Integer Motion Estimation

Responsible for architecture, integration, validation of a multi-format high-definition video decoder. Primary contribution in H.264 format, which includes hardware software partitioning

Responsible for modifications to several DAA (Direct Access Arrangement) products from Silabs. Also worked on PLL and crystal oscillator analog designs

- Training on CMOS digital and analog circuit design.- Custom circuit design and layouts - includes a floating point adder and a micro-controller- Layout design rule deck creation for various CMOS technologies