• Champion cross-functional collaborations for future NAND CMOS nodes • Design & develop dry etch processes to meet technology road map • Developed process by utilizing existing tools to reduce cost of transition to save $20M • Drive Photo & Films to deliver best-in-class processes for word line shrinkage and contact pad landing • Develop Staircase & Chop dry etch for RG-NAND product currently in market

• Develop HARC etch for periphery contacts for DRAM and Emerging Memory• Develop etch processes for patterning container using DPD flow• Specialist in developing Integrated etch for dielectric and mask levels• Wide etch process development experience for Poly-Si, mask, dielectric and metals layers

Avogy is a startup involved in developing normally ON GaN based JFET for high power applications. Avogy is developing a vertical bulk GaN technology that is different from planar transistors being developed by other companies using GaN on Si or Sapphire. I am module owner for metal and dielectric processes, tools, integration and failure analysis in these modules.• Investigated failure on Gate pad peeling during e-test and solved metal-dielectric adhesion issues by successfully developing compressive Nitride and adhesion layer to Gate metal stack and improved yield by 15%• Developed new material stack for Gate/p-GaN and Source/n-GaN contacts and reduced contact resistance by 100 times measured at Wafer Sort• Patterned and measured CTLM structures to measure contact resistivity for metal/GaN contacts• Performed DOE to optimize RTA temperature for lowering source/n-GaN contact resistivity• Developed lithography for robust lift-off process to pattern robust alignment marks to withstand above 1000 deg. C. epitaxial re-growths• Developed and optimized lithography process for patterning Source and Gate metal for robustness and process repeatability• Analyze failure modes and reduce shorts and yield loss in metal and dielectric modules• Design masks using Layout Editor for metal layers to improve yield and device performance• Develop recipes and implement wafer bow measuring techniques to estimate film stress• Train technicians; prepare SOPs and qualification procedures for e-beam and PECVD tools• Investigate RC and take action to lower reflected power for the dielectric deposition processes• Transfer processes to external fab and sustain through EOL device fabrication• Support WIP inspection and process control by CD and in-line film thickness monitor• Track process stability using SPC charts and implements FMEA as module owner to achieve high Cpks• Implement 3Ws and 8D methods for Root Cause Corrective Action (RCCA)

• Advise scientist on fabrication processes and characterizing materials for patterning solutions• Develop Oxygen based process to selectively etch polymer phases in DSA for sub 20nm patterning• Optimize Fluorine based etch processes to improve selectivity in dielectric films etch• Optimize process modules including etch, lithography and deposition for fabricate and test magnetic stack for next generation MTJ and MRAM devices• Design etch process to optimize CD control, WIW uniformity and selectivity for nanopatterns• Investigate novel spin-on hard mask characters by CDs and Selectivity by X-SEM• Program recipes in CD-SEM for measuring CDs, LER and LWR• Investigated temperature dependent magnetic properties using VSM and SQUID

• Coordinated with integrators and gathered requirements to develop new etch process for MRAM, PCRAM and RRAM development phase projects and CMOS devices• Developed etch process for dielectric and organic materials in ICP, CCP and Microwave etch systems• Developed fluorocarbon and halogen based recipes for dielectrics and metal etching respectively• Designed and fabricated nanopillars on photovoltaic films to improve efficiency of solar cells• Develop plasma process endpoint algorithms for Verity systems• Metrology and analysis using SEM, Stylus based surface profiler and ellipsometry measurement• Trained new process engineers on various sectors in semiconductor fabrication

• Conduct lectures on basic electromagnetic theory and offered lab guidance to undergraduates• Graded assignments, exams and lab reports• Prepared new and updated existing laboratory manuals from experience gained in teaching lab• Responsibilities include pre-lab lectures, instrument calibration and repair

• Synthesized crystalline and amorphous multi-phase metallic nanomaterials by chemical methods• Characterized metallic alloy materials using XRD and analyzed using Xfit software• Analyze XRD data to find peaks and curve fit to determine the composition of different alloys• Crosscheck JCPDS database to determine peaks of the alloy composition and confirm with XRD data• Analyzed nanomaterials with TEM for particle size, microstructure and morphology• Deconvoluted XRD peaks to determine composition of multi-phase materials• Analyze selected area diffraction from TEM to index the crystal lattice orientation of the nanoparticles• Investigated temperature dependent magnetic properties using VSM and SQUID• Investigated thermal phase transitions such as curie and crystallization temperature using Calorimetry• Designed RF heating circuit to heat magnetic nanoparticles and measure temperature in a ferrofluid

• Prepared alloy of inter-metallic elements using an arc furnace.• Investigated the structural properties pre and post absorption of hydrogen• Measured the hydrogen absorption property using closed hydrogen pressurized system• Investigated the kinetics of the absorption and desorption process

• Simulated ferromagnetic phase transitions on a 2-D Ising model with temperature• Programmed metropolis algorithm using Monte-Carlo methods in C to study 2-D Ising model