Sandeep Srinivasan Email & Phone Number

California, United States

Palo Alto, California, Us

VerifAI's Vision is to Empower Enterprises to build secure GenAI Apps using the collective intelligence of Multiple LLMsVerifAI's first Mission is to speed up verification by 100X using AI to generate accurate tests, stimuli, code, and fix bugs as no human can.Large Language Models (LLMs) will generate 1000X more Code and Content than humans We need AI to verify this volume and velocity of Code and Content.

inzone.ai is an AutoML Platform for Optimization Inzone's Machine Learning Platform allows you to build Apps without writing any code..

Palo Alto, Us

InZoneMobile is a startup with a focus on ‘context-aware’ mobile messaging on IOS and Android devices. InZoneMobile is building a Context-Aware Messaging platform using Machine LearningThe first application built on this Platform and API is an Intelligent Family Assistant called InZone.The InZone Family Assistant App allows families to communicate automatically and securely, using Machine learning and Predictive Algorithms.The InZoneMobile platform and API can be applied to many other verticals to build Real-time Predictive Apps.InZoneMobile ‘s platform is based on a patented method called ‘Deferred Notification’.

Chief Architect- Cloud and Mobile Infrastructure: InZoneMobile provided services for Soundhawk's Mobile and Cloud Architecture. Soundhawk has created a Bluetooth connected wearable smart hearing device that is configurable by a mobile phone..Designed and implemented the Web-services and Micro-Services API & Cloud Architecture Solution for Soundhawk which included: data collection and mining for device and mobile applications; a Cloud based user registration and authentication system for Soundhawk’s mobile app users; Designed an Agile Unified Software Release and Integration Systems (CI/CD) to provide transparency and visibility into the software and Firmware development process. Advised the company on Cloud Architecture, Data collection, Predictive Analysis and user engagement strategy.

Responsible for vision, R&D, strategy & business development from ground up for Mskribe Inc.Mskribe developed a Software Infrastructure (API's) and Algorithms which are now widely utilized by Samsung to reduce leakage and dynamic power consumption on Chips for Samsung’s mobile devices. The Mskribe software platform also provides a database-infrastructure and an API for developing power optimization tools for Samsung; Mskribe developed a sign-off power estimator which is widely used by Samsung for it’s power signoff methodology on ARM and other Processors.Samsung acquired Mskribe’s software assets.

CLK Design is a venture backed Company specializing in highly scalable multi-threaded software for Chip timing verification.Lead the company’s west-coast R&D. Drove the company to develop power optimization, clock-synthesis and routing software algorithms for Chip designers. The company’s products were used by Chip designers to route clocks and reduce the On-Chip power consumption.Managed the joint product development for the clock router with leading semiconductor companies in the US and Japan.

Synchronous Design was an EDA software company specializing in low power optimization algorithms to reduce power consumption on digital IC’s.Founded the company with investment from a public corporation. Built the company, product vision and code base from the ground up. Responsible for all business and R&D aspects. Responsible for growing the business from ground up to a substantial revenue stream.Merged Synchronous-DA with CLK-DA, a company specializing in multi-threaded static timing analysis tools for the ASIC/Processor design markets.

Us

Ammocore was a venture funded EDA company, specializing in highly scalable distributed multi-processing for chip design.Led a team of R&D engineers that developed world class algorithms for on-chip clock-tree synthesis.

San Jose, California, Us

• Managed and led the R&D Engineering team in physical IC design at Cadence, providing technical vision and leadership.• Successfully led product development and strategy, developing technology roadmaps for future Physical Design tools.• Managed the Floor-planning products and Clock-Tree Generation Tool (CTGEN) R&D group.

Santa Clara, California, Us

As Senior Product Development Engineer, was in the AMD’s Microprocessor CAD and Design group. Worked on 3 generations of x-86 compatible processors, with responsibilities including tool development, physical IC design, timing analysis, logic simulation, library characterization and design. Responsible for all aspects of physical design and tape-outs for multiple generations of processor chips.

Stanford Lead Professional Certificate

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Education record