Sriraj Dheeraj Turaga work email
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Sriraj Dheeraj Turaga personal email
I have 4 years industry experience in Mask/Reticle Synthesis, GDSII, OASIS and MEBES data formatsExpertise in batch automation and scripting with Perl, Python and TCLFabrication Experience in clean room environmentStrong background in semiconductor physics, Non-Volatile Memory, digital design, VLSI and computer architectureAcademic Exposure to ASIC design, place and route, static timing analysis, physical verification (LVS/DRC)
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Staff Cad EngineerNuvia IncAustin, Tx, Us
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Senior Staff Cad EngineerQualcomm Dec 2023 - PresentSan Diego, Ca, Us -
Staff Cad EngineerQualcomm Nov 2021 - Dec 2023San Diego, Ca, Us
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Senior Cad EngineerSamsung Austin Semiconductor Jul 2019 - Nov 2021
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Cad EngineerSamsung Austin Semiconductor Oct 2018 - Jul 2019CAD Automation Engineer
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Lead Product EngineerCadence Design Systems Jun 2018 - Oct 2018San Jose, California, Us -
Product Engineer 2Cadence Design Systems Jun 2016 - Jun 2018San Jose, California, Us• Currently working on Cadence MaskCompose - Reticle & Wafer Synthesis Suit and Cadence QuickView Signoff Data Analysis Environment.• Actively involved in Development and Support of MaskCompose - Reticle & Wafer Synthesis Suit.• Expertise in providing solutions to leading edge semiconductor manufacturing companies working with MaskCompose.• Continuously collaborated with R&D to ensure that customers strategic needs are met.• Published Rapid Adoption Kits (RAKs) for QuickView Signoff Data Analysis Environment.Gaining industry level knowledge and experience with Perl, TCL and Unix scripting.
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Graduate Teaching AssistantUniversity Of Utah Dec 2014 - May 2016Salt Lake City, Utah, Us"In learning you will teach, and in teaching you will learn." I served as a teaching assistant for almost 1 and a half years for several undergraduate courses across different disciplines of engineering.ECE 3700 Digital System Design - Under Prof. Chris Myers (Spring 2016)Responsible for holding discussion sessions, conducting labs and grading exams and home works for a class of 75 students. Helping students understand combinational and sequential circuit design through verliog, Complex digital system designs on Nexus 3 FPGA board through Xilinx ISE.CS 4400 Computer Systems - Under Prof. Mary Hall (Fall 2015)Responsible for conducting recitation sessions, labs, office hours and grading exams, home works for a class of 185 students. ME EN 2020/2080 Dynamics - under Prof. Larry DeVries (Spring 2015)My responsibilities include assisting a class of 120 students, evaluating papers and holding hours to clarifying doubts in Dynamics and Particle Dynamics. -
Research AssistantUniversity Of Utah Aug 2015 - Jan 2016Salt Lake City, Utah, UsIndependent Study - Advisor: Prof. Ken Stevens--> Design of an Asynchronous FPGA at the 65nm node and a performance comparison of Synchronous and Asynchronous FPGA.AMANDA Lab - Advisor: Prof. Masood Tabib Azar (USTAR Professor)--> Worked on Ultra-Sensitive Magnetometers for the Brain. My research dealt with the design andtuning of Piezo Electric strips to measure the magnetic field caused by the neuron firing in thebrain.--> Research on Adiabatic switches and Non-Volatile memory devices using NEMS.
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U - Phonathon Student RepresentativeUniversity Of Utah - Employment Sep 2014 - Oct 2014Salt Lake City, Utah, UsBuild rapport with alumni of the university in order to solicit donations for the College of Science.
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Summer InternBharat Dynamics Limited May 2013 - Jun 2013*Training in embedded systems and low power methodologies of VLSI*Design of High Magnetic Field Proximity Switch for defense applications*Research on design and analysis of reversible logic gates for low power applications.*Completed a project on Temperature and Humidity display using PIC Micro controllers as a part of the internship.
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TraineeHewlett Packard Oct 2012 - Dec 2012Was among the 10 student selected for a Training in Project(Management) & Operation Processes among 600 students.was briefed on the 5 process groups and 10 knowledge areas.was also a part of a training program on Information Technology Infrastructure Library(ITIL). The training included these important concepts.1. Service Strategy2. Service Design3. Service Transition4. Service Operation5. Continuous Service Improvement
Sriraj Dheeraj Turaga Skills
Sriraj Dheeraj Turaga Education Details
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University Of UtahComputer Engineering -
Gandhi Institute Of Technology And Management- (Gitam University)Electronics And Communications Engineering
Frequently Asked Questions about Sriraj Dheeraj Turaga
What company does Sriraj Dheeraj Turaga work for?
Sriraj Dheeraj Turaga works for Nuvia Inc
What is Sriraj Dheeraj Turaga's role at the current company?
Sriraj Dheeraj Turaga's current role is Staff CAD Engineer.
What is Sriraj Dheeraj Turaga's email address?
Sriraj Dheeraj Turaga's email address is sr****@****oup.com
What schools did Sriraj Dheeraj Turaga attend?
Sriraj Dheeraj Turaga attended University Of Utah, Gandhi Institute Of Technology And Management- (Gitam University).
What are some of Sriraj Dheeraj Turaga's interests?
Sriraj Dheeraj Turaga has interest in Photoshop, Social Services, Children, Beatboxing, Education, Environment, Photography, Science And Technology, Android Application Development, Disaster And Humanitarian Relief.
What skills is Sriraj Dheeraj Turaga known for?
Sriraj Dheeraj Turaga has skills like C++, C, Cadence Virtuoso, Verilog, Vhdl, Digital Electronics, Embedded Systems, Cmos, Java, Matlab, Html, Microsoft Office.
Who are Sriraj Dheeraj Turaga's colleagues?
Sriraj Dheeraj Turaga's colleagues are Marco Canello, Ram Prasad, Róbert Kuczkó, Shyam Balasubramanian, Osiris Diaz, Venkata Ramana Ayyagari, Aaron Harper.
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