Steve Clevenger Email & Phone Number

Livermore, CA, US

• Responsible for the design and development of Cortex-M/ARM7/ARM9 debug stacks to work with GDB/Eclipse based software development tools
• JTAG/SWD (serial wire) debug and trace over USB.
• ARM multi-core and coprocessor support.
• Designed and developed the LPC-Link, and DAPLink based LPC-Link2 probe firmware used for in-circuit debug on the NXP LPC family of development boards. Maintenance and add-on features over a 6-year product life cycle.
• Provided input to silicon, hardware, and boot ROM design teams on potential improvements and features for debug support for new MCU silicon.
• Pre-silicon validation of various ARM Coresight debug implementations for emerging MCU designs using FPGA models and, later, on pre-production silicon.

• Private startup involved in the design, fabrication, and manufacture of electronic Time-of-Flightgymnastics scoring devices.
• Designed, developed, and productized an NXP LPC based electronic Time-of-Flight scoring device for USAG and FIG trampoline competition and training based on retro-reflective sensor technology.
• PCB design and layout.
• Firmware design and development.
• Windows host based Graphical User Interface (GUI) design and development.
• Installation/setup guide, and other user documentation.

• Private startup involved in aftermarket engine control modules for gasoline engine Flex-Fuel conversions.
• Designed and developed multi-core engine control firmware partitioned across a pair of loosely-coupled ARM Cortex-M microcontrollers (MCU). PWM, SPI, and RTX RTOS.

Cambridge, Cambs, GB

• ARM Electronic System Level (ESL) development and analysis tools.
• Principle engineering resource for the Realview multi-core debugger.
• Developed target side support for DSPs commonly paired with ARM7.
• IEEE1149.1 JTAG support for proprietary ARM emulation hardware.
• DWARF-3/COFF OMF readers, image loaders, and debug illusion.
• Managed third party contractors as needed.

Cambridge, Cambs, GB

• Designed contract multi-core debugger support for RISC and DSP (Harvard) architectures.
• ARM, Oak, Teak, Teaklite, Motorola 5660x series, and Analog Devices SHARC support.
• Incorporated C++ support based on DWARF-3/COFF Object Module Format (OMF) standards.

Wilsonville, OR, US

• Top billing consultant for in-house and onsite services.
• Proposed, developed, and delivered project and non-project based consulting services primarily focused on custom RTOS debug solutions.
• Presented, and delivered a middleware porting layer to simulate the features and operation of a legacy RTOS allowing a Fortune 300 customer to leverage an existing software base during migration to the VRTX RTOS.

• End user software applications support of Microtec embedded development tools and VRTX RTOS.
• Developed, supported, and maintained the debug monitor products, device drivers, and board support libraries.
• Project engineer on the multi-tasking debugger team.
• Domestic and foreign trade shows, and technical newsletter contributing author.
• Support contact and liaison for the Microtec subsidiaries in Germany and France.