Steven Dettwiler Email and Phone Number
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Over 15 years of technical and engineering experience with expertise in power delivery validation, hardware design, circuit signal quality analysis, debugging, and root-cause failure analysis. Skilled in test board design, Intel hardware architecture validation, debugging tools, testing, and verification to the component level. Extensive experience providing engineering customer support to large multinational customers. Recognized team player and collaborator with strong training, supervisory, problem-solving, and communication skills.AREAS OF EXPERTISEHardware Validation/Verification | Signal Quality Scope Work | Software TestingBoard Design/ Layout | Component Qualifications | Altium/Cadence/Allegro | Debugging & Troubleshooting Customer Training, Service & Support | Technical Guidance & Leadership | Power Delivery TECHNICAL SKILLS Software: C programming, Altium 17/18 Electrical Cad, Cadence/Allegro 17.2, RSLogix 500 PLC, PSoC Creator, Solid Works ver.9 Mechanical Cad, Easy PC Electrical Cad v. 18, Windows®7,10, and MS Office Suite, LabVIEW. Equipment/Tools:High-Speed Digital Oscilloscope, Chroma Load, Intel VRTT, DMM, Audio Precision 585, HP Logic Analyzer, NI-DAQ, Keithley battery simulator, Agilent 34972A DAQ, ST-Micro development load board, Cypres PSOC, TH/SMT soldering and other lab equipment. In Process: Embedded Firmware with Visual Studio using C programming, JavaScript, Circuit Python, Arduino, PIC, ARM Cortex-M.
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Engineer Validation, HardwareWisa TechnologiesBeaverton, Or, Us -
Engineer Validation, HardwareWisa Technologies Jun 2023 - PresentSan Jose, California, Us -
Hardware Verification / Validation Engineer / Lab ManagerSteelcase Mar 2017 - Mar 2022Grand Rapids, Michigan, Us• Key team member in creating the electrical hardware for a product called Desk Wizard using Altium ECAD/Schematic/PCB Layout/BOM. Performed full electrical verification/validation, signal integrity, core, and power delivery measurements. • Performed electrical verification/validation of newly created Internet of Things/Smart and Connected i.e., Room Wizard, Fremont, Mesh Node Relay, PIR sensors, USB-C charger. • Responsible for recommending design changes based on verification /validation/ results.• Created test plans for all environmental testing. Work with codes and compliance engineering on EMC (Electromagnetic Compatibility) and UL testing. • Participate in design solutions in a system of integrated products, (software, and hardware) with connectivity in mind. • Responsible lab manager overseeing all duties related to design /reworking new prototypes/ BOM changes, safety, equipment/calibration, ordering supplies, and tracking inventory -
It Systems Improvement SpecialistPathfinders Of Oregon, Intel Encore Program Sep 2016 - Mar 2017
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Hardware Engineer/Applications EngineerIntel Dec 2011 - Jul 2016Santa Clara, California, UsAs the lead engineer, I wrote power delivery (PMIC) analog validation test plans for tablet/phone designs on Intel architecture. I trained and managed support technicians in implementing and utilizing test and measurement methodologies and best practices. Designed (schematic /board layout) interposer/test hook boards for testing power delivery mainboards using Cadence/Allegro CAD tools. Supported Amazon/Facebook for all things OCP (Open Compute Project) and Cloud networking. Worked with design vendors, ROHM, Texas Instruments, Dialog, to resolve power delivery bugs, baseline standard validation procedures and regression testing of PMIC (Power Management IC) stepping ’s. Performed verification and evaluated signal integrity designs using oscilloscopes, DMM, digital analysis system (DAS), an in-circuit emulator (ICE), and software tools to validate areas such as USB, PCIe, Memory, SATA, Audio, and LAN. -
Harware EngineerIntel Jan 2011 - Dec 2011Santa Clara, California, UsDesigned (schematic /board layout) with Cadence / Allegro test boards and developed signal quality verification test plans. Created detailed rework standard documents and instructions for all FFRD (Form Factor Reference Designs) which were distributed companywide -
Electrical Validation EngineerSummit Semiconductor, Llc Nov 2009 - Dec 2010San Jose, California, UsDeveloped and executed electrical system verification/validation test plans for a wireless speaker technology and product during the initial development and testing phase for a startup company. -
Validation / Sustaining / Application Engineer/ Design Engineering TechnicianIntel Corporation Jun 1990 - Sep 2009Santa Clara, California, UsLead validation engineer for desktop motherboards including Skull Trail (Fastest PC Enthusiast Platform).Created electrical validation board level test plans, oversaw the duties of test technicians, ensured signal quality verifications, and overall product readiness and time-to-market deadlines.Evaluated and reduced costs by $1.56M via in-depth engineering analysis of existing components and bill of material alternatives for production products as a cost-cutting effort. Document and drove to closure engineering issues and fixes by working with mechanical, BIOS, marketing and design engineers to ensure all issues are resolved before the next fabrication iteration. Provided marketing and desktop product support to multi-national customers (MNC) DELL, Gateway, Micron PC, Diebold, and local/international channel customers.Created and taught technical classes and showcased demos at Intel Developer Forum and Intel Field Focus Training seminars.Handled multiple issues simultaneously; created dynamic solutions to issues resulting in numerous excellent performance recognition and feedback from the support groups and account teams. Converted abstract marketing ideas into Product Requirement Documents (PRD) and Technical Product Specifications (TPS) to develop and support a wide range of high volume time-to-market motherboard products based on the latest Intel chipsets.Sustained motherboard designs post-launch debugging to the design level and creating changes via ECOs. Debugged and evaluated signal integrity using oscilloscopes, DMM, digital analysis system (DAS), an in-circuit emulator (ICE), and software tools to power on new designs and validate areas such as USB, PCIe, Memory, SATA, Audio, video, and LAN.Created design schematics and bill of materials using Cadence design tool.
Steven Dettwiler Skills
Steven Dettwiler Education Details
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Oregon Institute Of TechnologyElectronics Engineering Technology
Frequently Asked Questions about Steven Dettwiler
What company does Steven Dettwiler work for?
Steven Dettwiler works for Wisa Technologies
What is Steven Dettwiler's role at the current company?
Steven Dettwiler's current role is Engineer Validation, Hardware.
What is Steven Dettwiler's email address?
Steven Dettwiler's email address is st****@****tel.com
What schools did Steven Dettwiler attend?
Steven Dettwiler attended Oregon Institute Of Technology.
What are some of Steven Dettwiler's interests?
Steven Dettwiler has interest in Poverty Alleviation.
What skills is Steven Dettwiler known for?
Steven Dettwiler has skills like Electronics, Manufacturing, Computer Architecture, Hardware, Semiconductors, Hardware Architecture, Soc, Embedded Systems, Debugging, Asic, Microprocessors, Processors.
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