Subodh Gupta Email and Phone Number
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Key Strengths - Extensive experience managing highly talented R&D teams for 13+ years, and driving innovation on critical time to market projects for advanced computer-aided design (CAD) algorithms and tools for integrated circuits (ICs) for 20+ years. - Develop project strategies and directing geographically dispersed teams through all phases of product development including design, specification, implementation, testing, release and maintenance. - Proven track record of technical leadership in improving software performance such as run time and memory reduction and overall quality leading to minimal customer issues. - Technical Expertise in various aspects of Electronic Design Automation, in particular, Static Timing Analysis, Design for Low Power, Logic Synthesis, Timing Optimization, and Place and Route. - Over 8 years of experience in Field Programmable Gate Arrays (FPGA) architectures and design tools for mapping customer designs to FPGAs. - Proven to drive results for top customer facing products and ability to quickly adapt to dynamic development environments. Technical Skills Summary - Over 14 years of experience in developing large complex algorithmic software solutions using C/C++, efficient data structures, and graph theory concepts. - Proficient in C/C++ programming and cross-platform porting on wide variety of Unix/Linux and Windows platforms. - Strong background in data structures, and the ability/knowledge to write and solve complex algorithms. - Extensive usage of C++ STL and OOD techniques. - Highly skilled in software and hardware low power reduction techniques for FPGAs and ASICs. - Familiarity with Agile software development methodology and other software engineering methodologies.- Familiarity with machine learning algorithms such as gradient decent, conjugate gradient, logistic regression etc.. for creating analytical models to fit a set of data points.
Synopsys Inc
View- Website:
- synopsys.com
- Employees:
- 28438
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Executive Director Of EngineeringSynopsys IncBelmont, Ca, Us -
Senior Director Of EngineeringSynopsys Inc Mar 2018 - PresentSunnyvale, CaLeading team of talented engineers and managers on industry leading sign off tool focusing on:1. Distributed analysis 2. Hierarchical Analysis targeting Billion+ instances3. Simultaneous multi corner multi mode analysis4. Run-time and memory optimization -
Software Engineering Manager/DirectorIntel Corporation May 2012 - Mar 2018San JoseManaging a team of ~50 engineers and 6 managers working on Altera’s Quartus II tool supporting following: 1. Device modeling for Altera’s FPGAs. This involves converting hardware implementation into software representation using efficient data structures with emphasis on memory efficiency and run time. 2. Placer and router for periphery blocks such as Transcievers, IOs, and PLLs. Lead efforts to improve the placement and routing algorithms which lead to significant improvement in runtime, memory and increased placement success rate for highly utilized designs.3. Currently leading a cross functional Core team to deliver the QII support for Altera's next generation devices. Role requires creating overall schedule for software deliverables based on Marketing and Field requirements. Monthly presentation to upper management on schedule status and mitigation plans to meet the project deadlines.4. Collaborated and prioritized with multiple cross functional teams for schedule/feature alignment and to ensure timely delivery of the product. Used Lateral Works fastProject to get correct dependencies across various departments.5. Recruited, developed and retained talented technical team members. Implemented performance improvement plans to raise team productivity. Conducted employee performance reviews and established performance metrics to understand productivity of employees
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Senior Software Engineering ManagerXilinx Apr 2006 - May 2012San JoseHands on technical manager responsible for development of design automation tools for Xilinx’s FPGAs.1. Responsible for strategic road map and development of next generation faster and low memory footprint power analysis and power optimization engine for Xilinx’s Vivado design suite. 2. Architected algorithms to improve the estimation of switching activity in power analysis engine, resulting in accuracy of power analysis tool.3. Architected algorithms to optimize power during placement and routing. The work was published in Xilinx's internal journal and also in a peer reviewed conference.4. Influenced hardware decisions to add new hardware features directed at enabling power optimization in software by analyzing the potential power savings, impact on area (which translates to cost), and degradation of achieved frequency.5. Communicated schedule and milestones to executive team, managed requirements gathering and design processes, and led the development and testing effort. -
Senior R&D EngineerSynopsys Aug 2003 - Apr 2006Worked on various aspects of Synopsys's signoff Power analysis tool PrimePower such as:1. Integration of PrimePower with PrimeTime to provide a complete solution and simplify user interface. 2. Implemented sign-off quality switching activity (statistical) based power estimation engine at gate level for PrimePower product. 3. Implemented waveform generation algorithm for accurate peak power estimation for time-based power estimation engine in PrimePower.4. Developed modules for supporting different switching activity file formats, which removed the extra step of converting different file formats into a readable format. This enabled the tool to handle large files and led to substantial run time improvements. -
Member Of Consulting StaffCadence Design Systems Inc Aug 2000 - Aug 20031.Implemented algorithms for optimizing timing and area in Cadence’s First Encounter product. 2. Worked on the next generation prototyping project to create a fast and high capacity prototyping tool to identify product design issues early in the design process.3. Implemented power estimation engines for BuildGates product.4. Implemented solutions such as clock gating which resulted in power savings for consumer electronics. 5. Used machine learning algorithms such as gradient decent, logistic regression etc.. to create models for predicting power consumption during earlier phases of product design cycle. This allows customers to make decisions regarding power consumption early on, without going through costly redesign cycles.
Subodh Gupta Skills
Subodh Gupta Education Details
Frequently Asked Questions about Subodh Gupta
What company does Subodh Gupta work for?
Subodh Gupta works for Synopsys Inc
What is Subodh Gupta's role at the current company?
Subodh Gupta's current role is Executive Director Of Engineering.
What is Subodh Gupta's email address?
Subodh Gupta's email address is su****@****sys.com
What schools did Subodh Gupta attend?
Subodh Gupta attended University Of Illinois At Urbana-Champaign, University Of Illinois Urbana-Champaign, Indian Institute Of Technology, Kharagpur.
What skills is Subodh Gupta known for?
Subodh Gupta has skills like Fpga, Eda, Soc, Verilog, Asic, Algorithms, Semiconductors, Vlsi, Perl, C++, Tcl, Static Timing Analysis.
Who are Subodh Gupta's colleagues?
Subodh Gupta's colleagues are Naseem Ahmad, Polo Zhang, Prateek Satija, Kavi Bujji, Md Osman Nayeem, Sukshith Jain, Mina Snyder.
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Subodh Gupta
Mountain View, Ca3gmail.com, google.com, expedia.com2 -844790XXXX
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Subodh Gupta
Fremont, Ca5hotmail.com, purestorage.com, nantworks.com, purestorage.com, google.com3 +131088XXXXX
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Subodh Gupta
Greensboro, Nc4mindtree.com, gmail.com, mindtree.com, gmail.com -
Subodh Gupta
San Francisco, Ca3flextronics.com, gmail.com, valoventures.org1 +140857XXXXX
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