Sudhakar Reddy Email & Phone Number

18 years of experience in VLSI backend business/activities including owning projects, design implementation (Netlist to GDSII), IP verification and custom extraction)., Ownership of Complete PD functional delivery at Open-Silicon, Responsible for PD team day to day activities along with recruitment and training. I have wide experience in the field of EDA tool validation/testing and pre, post sale support, Got good experience in interconnect line parasitic modeling for deep-submicron processes like 45/65nm processes. and hands on complete ASIC/FPGA design flow. including CMOS fundamentals...Hands on Experience in physical design flow. Voltage drop analysis on Power grids using CoolTime Voltage drop aware timing analysis using CoolTime Power Grid Integrity checks using CoolCheck Correlation between CoolTime, Primetime and HSPICE for STA and SI analysis. Support for MMMC timing and noise aware optimization techniques in CoolPower Knowledge in Physical Verification. Accurately Modeled Interconnect parasites for deep-sub micron processes using Columbus-AMS

Listed skills include Eda, Tcl, Asic, Verilog, and 16 others.