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Director, Engineering. Qualcomm India Private Limited.Certified with Executive Program in General Management at MIT Sloan. Worked at Texas Instruments India for ~20 yrs after completing Bachelors Engineering in Computer Science at Government College of Technology, Bharathiar University Coimbatore.Passionate about and experienced in establishing and Building Highly motivated Competency Centric teams focused on delivering results. Managed Technical Leads and teams spread across sites (India, US, Europe and China). Well recognized as key leader and strong manager focussed on Organization and People development and embedding fundamental values including Customer and Process Centricity. Known to build and nurture collaborative environment including partner companies and successfully deliver on efforts across departments for Chip Implementation, EDA/CAD Methodology and Tools and Product Engineering Teams responsible for Silicon bringup.
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Director, EngineeringQualcomm India Private Limited Sep 2019 - Sep 2022Director Front End CAD, Principle Engineer DFT CAD
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Vice President OperationsSigmaquant Technologies Private Limited Apr 2018 - Aug 2019Driving Technical Operations to Scale.
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Head Of OperationsAcceletrade Jan 2015 - Apr 2018Driving Predictable Operations with High Availability of High Performance Colo Infrastructure. -
Engineering Manager Backplane Ip Layout TeamTexas Instruments May 2012 - Dec 2014Dallas, Tx, UsResponsible for IP Layout Delivery for Libraries including Core Library, Compiler Memories and Mixed Signal IP - IOs and Analog IPs. Driving Flawless Execution through Delivery fo Robust Layouts to Aligned Commits. Using formal methods to Align commits with customer need & available bandwidth. Established a strong team identity known to be a Skilled, Well Connected and Engaged team. Driving core processes and Quality priorities include Establishing key processes for Handoff guidelines. Helping build Local Champions for multiple domains for ongoing IP development programs on 28nm and 45 nm node. Supporting Org initiatives in driving Continuous improvement to reduce IP Rework. -
Manager Backplane Eda Ipcad And Dftm Solutions.Texas Instruments Feb 2011 - Oct 2012Dallas, Tx, UsResponsible for IPCAD and DFTM Solutions. Managed several R&D Product Development and EDA CAD Development teams. IPCAD and World wide DFTM Toolkit Development teams between (Jun2011-Jan2013.)Key Highlights: Achieved 2X Volume Characterization throughput improvement and Cycle time reduction goals for multiple libraries (28nm High performance and 65nm Low power libraries). Guided a cross functional team across departments including IP development, EDA Vendor Cadence systems, IT, Program management and Backplane IPCAD development teams through effective goal setting and in-depth analysis of system bottlenecks and entitlement knobs. Improved Library Quality with New Age QC Systems concurrently working on establishing a new roadmap for re-engineered QC systems. Established Customer Centric Result oriented mindset with Metrics for Quality/Usability. Deployed the development solutions with active impact tracking on low power and high performance libraries on 28 nanometer technology node. Managed key technical talent on DFTM solutions.
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Manager, Custom Business (Asic) Dft Services IndiaTexas Instruments India Aug 2007 - May 2011Managed India DFT Services Operations as part of the Custom ASIC Business unit at Texas Instruments India Pvt Limited between (Aug2007 and Jun2011) ASIC India DFT Services team has a proven record of having Successfully Ramped 10+ highly complex Custom ASIC Devices across 90,65 and 45/40 nm Technology nodes. The team consisted of several DFT Leads and a group of DFT Engineers working on highly challenging programs on leading edge technology nodes. Part of the team recognized for achieving – 15 Week Cycletime for Final Netlist Handoff to Qualified Initial Samples on an Complex ASIC Design.Delivered 1st pass Silicon success on and Leadership Cycletimes w.r.t /A samples with robust Test Quality on the first 65 nanometer ASIC products. By delivering High Quality Test Vectors and through a 2 year collaboration and partnership with Product Engineering team across Sites. A TI First in enabling the 1st 65nm device which has hit the 4 month RTP(Release to Production) Cycletime.
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Manager Dftm CadTexas Instruments Mar 2004 - Oct 2007Dallas, Tx, UsLead the DFTM CAD Toolkit comprising of multiple projects in building end2end solutions in the areas of Memory Test, Logic Test and Test Vector Validation solutions. Successfully developed and deployed the DFTM CAD Toolkit with the reference flows including EDA Tools and InHouse Developed CAD solutions across multiple Technology Nodes. (2004-2007)Key Highlights : Created, Established and deployed the DFTM Toolkit covering Tools and Flows in the areas of Logic Test, End2End Memory Test solutions and Test Vector Validation flows. Created Several Technical Leaders and Project Leads in the process. Most successful new Toolkit to see 100% deployment across all Business Units within TI. The team was recognized for most publications in the dept.Championed several Organizational Development Initiatives including a new Performance Management and Rating process for the Division. Championed the deployment of Leadership Development Program and mentored several new Project leaders as part of DFTM Development. Evaluated and Established several Talent Development programs and developed a specialized program in initiating new engineers into the org. Participated and Lead several cross function teams and world wide initiatives in having systems for improving TDL Quality and effecting cost savings through irreversible corrective action deployment plan.
Sundar Padmanabhan Skills
Sundar Padmanabhan Education Details
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Mit Sloan School Of ManagementBusiness Administration And General Management -
Government College Of Technology, Coimbatore. Bharathiar University.Computer Science
Frequently Asked Questions about Sundar Padmanabhan
What is Sundar Padmanabhan's role at the current company?
Sundar Padmanabhan's current role is Ex Director, Engineering at Qualcomm India Private Limited.
What is Sundar Padmanabhan's email address?
Sundar Padmanabhan's email address is psundarp@ti.com
What is Sundar Padmanabhan's direct phone number?
Sundar Padmanabhan's direct phone number is +9180253*****
What schools did Sundar Padmanabhan attend?
Sundar Padmanabhan attended Mit Sloan School Of Management, Government College Of Technology, Coimbatore. Bharathiar University..
What are some of Sundar Padmanabhan's interests?
Sundar Padmanabhan has interest in Environment, Children, Education, Health.
What skills is Sundar Padmanabhan known for?
Sundar Padmanabhan has skills like Competency Management, Leadership Development, Change Management, Eda, Asic, Dft, Debugging, Soc, Semiconductors, Vlsi, Project Management, Verilog.
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