- Experienced Pre-Silicon Verification/Validation Engineer passionate about creating innovative solutions to complex challenges in the semiconductor industry.- Skilled in Verilog, System Verilog, UVM, and Functional Verification.- Expert in developing Testbenches from scratch.- Hands-on experience in IP design and verification, with a good knowledge of AXI, AHB, and APB.- Proficient in Git Version Control System, with experience in Python, Shell scripting, and C programming.- Experienced in Synthesis, Physical Design Flow (Digital) using Mentor Precision, Cadence Genus & Innovus tools.- Skilled in Synopsys, Cadence, and Mentor EDA tool, Xilinx ISE.- Robust quality assurance professional with a Bachelor in Technology specialized in Electronics and Communication Engineering from the National Institute of Science and Technology.
Listed skills include Cadence Schematic Capture, Risc V, Tanner Eda, Git, and 41 others.