AeroLeads people directory · profile

Supriya Venkataram Kurpad Email & Phone Number

Actively looking for Spring’25 Co-ops and FTE roles | MS VLSI Design @ USC | Physical Design | Physical Verification | VLSI | Nano materials and fabrication and Nanotechnology | UVCE'21
Location: Los Angeles, California, United States 3 work roles 2 schools
LinkedIn matched
✓ Verified Jul 2026 3 data sources Profile completeness 71%

Contact Signals

LinkedIn Profile matched
3 free lookups remaining · No credit card
Role
Actively looking for Spring’25 Co-ops and FTE roles | MS VLSI Design @ USC | Physical Design | Physical Verification | VLSI | Nano materials and fabrication and Nanotechnology | UVCE'21
Location
Los Angeles, California, United States

Who is Supriya Venkataram Kurpad? Overview

A concise factual answer block for searchers comparing this professional profile.

Quick answer

Supriya Venkataram Kurpad is listed as Actively looking for Spring’25 Co-ops and FTE roles | MS VLSI Design @ USC | Physical Design | Physical Verification | VLSI | Nano materials and fabrication and Nanotechnology | UVCE'21 based in Los Angeles, California, United States. AeroLeads shows a matched LinkedIn profile for Supriya Venkataram Kurpad.

Supriya Venkataram Kurpad previously worked as Physical Design Engineer at Intel Corporation and ASIC Physical Design Trainee at Rv-Vlsi Vlsi And Embedded Systems Design Center. Supriya Venkataram Kurpad holds Ms Vlsi Design, Semiconductor Manufacturing Technology from University Of Southern California.

Profile bio

About Supriya Venkataram Kurpad

Bringing circuits to life, one nanometer at a time, I am a passionate VLSI design professional dedicated to converting intricate challenges into effective solutions. Currently pursuing a Master of Science in VLSI Design at the University of Southern California, I thrive at the intersection of logic and creativity, where technology meets innovation.At Intel, I had the incredible opportunity to work with advanced 10nm and 7nm technologies, immersing myself in the dynamic realm of Physical Design. I developed detailed floorplans, addressed complex timing issues, and optimized physical design workflows to achieve seamless tape-outs. My hands-on experience in troubleshooting DRC violations and refining sign-off procedures has sharpened my analytical abilities and reinforced the critical nature of precision in every aspect of design.Skilled in utilizing tools like Synopsys ICC2, Cadence Virtuoso, and Primetime, I take pleasure in fine-tuning timing paths and leveraging Tcl and Python scripting to streamline processes. My engagement in ASIC design and static timing analysis has enriched my understanding of the crucial balance between performance and efficiency, demonstrating that every detail matters.Beyond circuits and signals, I am intrigued by the wider impacts of technology on society. I enjoy exploring cutting-edge trends in chip design, machine learning, and the Internet of Things (IoT), always eager to discover how we can expand the limits of what’s achievable. My participation in organizations like IEEE and Women in Engineering has further ignited my passion for collaboration and mentorship, as I believe that diversity drives innovation.Outside of work and studies, you can find me exploring tech blogs, experimenting with new programming languages, or engaging in thoughtful discussions about the future of semiconductors. For me, engineering transcends mere problem-solving; it represents a mindset of growth and a commitment to making a meaningful difference in the world.

3 roles

Supriya Venkataram Kurpad work experience

A career timeline built from the work history available for this profile.

Physical Design Engineer

Intel Corporation

Bengaluru, Karnataka, India

*Managed and coordinated layout tasks for sub-micron technologies like 10nm and 7nnm, resulting in a 95% design closure rate on schedule, minimizing project delays and meeting crucial milestones.*Took charge of debugging errors arising from Design Rule Checks (DRCs) during rerouting, ID layer modifications, opens and shorts, and diverse sign-off approaches resulting in an impressive 80% reduction in DRC-related design iterations.*Ensured design compliance by conducting rigorous spec checks, executed layout rerouting of nets through iterative optimization, resulting in a 95% improvement in design quality scores and a seamless tape-out process*Implemented ECO to streamline sign-off flows, ensuring a smooth tape-out process

Jun 2022 - Jun 2023

Asic Physical Design Trainee

Rv-Vlsi Vlsi And Embedded Systems Design Center

Bengaluru, Karnataka, India

*Acquired working knowledge on ASIC PD flow, APR flow that involves Floorplan, Powerplan, IR Drop Analysis, Placement, Clock Tree Synthesis and Routing*Developed a reliable floorplan with channel spacing to control the congestion throughout the PnR stage for the ease of routing and building clock tree.*Developed an efficient power mesh by coding Tcl scripts to meet the specified IR Drop and ensuring they do not produce any physical DRCs and errors.*Generated an highly optimized placement block with controlled congestion through various iterations of channel spacing and modifying floorplan.*Generated timing reports at every stage of PD flow and analyzed the TNS, WNS, Delays, Clock Skew, Transitions violations, CRPR, Network and Source Latency.*Developed an ASIC Block free from DRC,LVS,DFM, Setup, Hold and slew violations for final tape-out.*Well-versed with PVT corners, Modes, Scenarios, Path Based Analysis (PBA), and Latch Based Design in STA

Dec 2021 - Jun 2022

Electronics Engineer

Pravaig Dynamics

Bengaluru, Karnataka, India

*Worked on Battery Management System design for Automotive EVs.*Finding alternate parts for the components in BOM.*Responsible for the procurement of components present in BOM for BMS design with Supply Chain Management Team.*Worked on Harness and Routing for Automotive EVs*Development of schematics for design documentation of harness data and routing.*Worked on design calculations for BMS master and slave

Jul 2021 - Oct 2021
2 education records

Supriya Venkataram Kurpad education

Bachelor Of Engineering - Be, Electronics And Communications Engineering

Bangalore University

Activities and Societies: IEEE, Women in Engineering (WIE)

FAQ

Frequently asked questions about Supriya Venkataram Kurpad

Quick answers generated from the profile data available on this page.

What is Supriya Venkataram Kurpad's role at their current company?

Supriya Venkataram Kurpad is listed as Actively looking for Spring’25 Co-ops and FTE roles | MS VLSI Design @ USC | Physical Design | Physical Verification | VLSI | Nano materials and fabrication and Nanotechnology | UVCE'21.

Where is Supriya Venkataram Kurpad based?

Supriya Venkataram Kurpad is based in Los Angeles, California, United States.

What companies has Supriya Venkataram Kurpad worked for?

Supriya Venkataram Kurpad has worked for Intel Corporation, Rv-Vlsi Vlsi And Embedded Systems Design Center, and Pravaig Dynamics.

How can I contact Supriya Venkataram Kurpad?

You can use AeroLeads to view verified contact signals for Supriya Venkataram Kurpad, including work email, phone, and LinkedIn data when available.

What schools did Supriya Venkataram Kurpad attend?

Supriya Venkataram Kurpad holds Ms Vlsi Design, Semiconductor Manufacturing Technology from University Of Southern California.

Find 750M verified contacts

Search by job title, company, industry, location, and seniority. Export verified B2B contact data when you need it.