Supriya Venkataram Kurpad Email & Phone Number

Bringing circuits to life, one nanometer at a time, I am a passionate VLSI design professional dedicated to converting intricate challenges into effective solutions. Currently pursuing a Master of Science in VLSI Design at the University of Southern California, I thrive at the intersection of logic and creativity, where technology meets innovation.At Intel, I had the incredible opportunity to work with advanced 10nm and 7nm technologies, immersing myself in the dynamic realm of Physical Design. I developed detailed floorplans, addressed complex timing issues, and optimized physical design workflows to achieve seamless tape-outs. My hands-on experience in troubleshooting DRC violations and refining sign-off procedures has sharpened my analytical abilities and reinforced the critical nature of precision in every aspect of design.Skilled in utilizing tools like Synopsys ICC2, Cadence Virtuoso, and Primetime, I take pleasure in fine-tuning timing paths and leveraging Tcl and Python scripting to streamline processes. My engagement in ASIC design and static timing analysis has enriched my understanding of the crucial balance between performance and efficiency, demonstrating that every detail matters.Beyond circuits and signals, I am intrigued by the wider impacts of technology on society. I enjoy exploring cutting-edge trends in chip design, machine learning, and the Internet of Things (IoT), always eager to discover how we can expand the limits of what’s achievable. My participation in organizations like IEEE and Women in Engineering has further ignited my passion for collaboration and mentorship, as I believe that diversity drives innovation.Outside of work and studies, you can find me exploring tech blogs, experimenting with new programming languages, or engaging in thoughtful discussions about the future of semiconductors. For me, engineering transcends mere problem-solving; it represents a mindset of growth and a commitment to making a meaningful difference in the world.