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Swapnil Tembhare Email & Phone Number
Director of Technology | R and D
at
SiClarity
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✓ Verified Jun 2026
3 data sources
Profile completeness 86%
Current company
Role
Director of Technology | R and D
Location
Mumbai, Maharashtra, India
Company size
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Swapnil Tembhare is listed as Director of Technology | R and D at SiClarity, a company with 28 employees, based in Mumbai, Maharashtra, India. AeroLeads shows a matched LinkedIn profile for Swapnil Tembhare.
Swapnil Tembhare previously worked as Director of Technology at Siclarity and SOC Design & Integration (Sr. Tech Lead) at Intel Corporation. Swapnil Tembhare holds Doctor Of Philosophy - Phd, Nanoribbon/Nanosheet Fet Design For Improved Reliability And Switching Performance from Indian Institute Of Technology, Delhi.
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SiClarity
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Profile bio
About Swapnil Tembhare
I bring nearly a decade of experience in SOC physical design & Integration, HV EOS, physical verification, runset development, and CAD engineering. Throughout my career, I have worked over a wide range of Intel 22/14/10/7/4/3/20A/18A and TSMC technology nodes. I have consistently contributed to company success, surpassing design and performance objectives while optimizing operational impact with limited resources. My areas of expertise encompass device physics, ASIC/Physical design, workflow automation, physical verification, HVEOS, DRC/LVS runset development, PDK development, reliability, debugging tools, problem-solving, and critical thinking.I have served as Sr. Technical Lead for the Networking & Edge Physical Design Integration Team at Intel. My responsibilities included establishing full-chip floorplans from RTL, SOC integration, and driving physical verification and HV DRC convergence. Additionally, I lead a team with a charter to develop runsets for post-silicon debug database generation, full chip layout verification for DFM, automation support, and scripting for physical design EDA tools. Custom flow development to analyze and test design methodologies for full chip layout place & route. I collaborate closely with senior leadership, stakeholders, and cross-functional teams to ensure that our technological support infrastructure propels the company's progress while minimizing costs.My colleagues characterize me as a forward-thinking, dedicated, and approachable Design and CAD specialist who consistently delivers effective solutions on time and within budget.
Current workplace
Swapnil Tembhare's current company
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Siclarity
7 roles
Swapnil Tembhare work experience
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Director Of Technology
CurrentLeading the development of AI-accelerated DTCO solutions, enhancing manufacturability of next-generation CFET devices.Spearheading transistor modeling, circuit simulations, and thermal-mechanical simulation software to advance technological capabilities.Developing tailored solutions for fabless companies, foundries, and tool suppliers to drive industry.
Jun 2024 - Present
Soc Design & Integration (Sr. Tech Lead)
Leading SOC Floor planning, HV EOS, Physical verification convergence for NEX Edge product at Intel.Contributed towards Meteor Lake, Alder Lake, Arrow Lake, Raptor Lake, Sapphire Rapids Tapeins.--> RTLFP, bump planning, Partition & SOC LV Signoff, High voltage DRC / EOS Signoff & flow development, PDFx, physical design implementation, addressing physical.
Nov 2020 - Jun 2024
Technology Leader
Jun 2014 - Jun 2024
Soc Design Engineer (Technical-Lead)
Lead post-silicon debug team & CAD navigation enablement for all Intel designs & products, Full-chip LV/DRC for Intel future gen Xchips, ICV-based runset development/debug/training & global Support.Custom Layout Design Methodologies, DFM, Layout Productivity scripts, Full Chip DFM, Indicators, Tape-In.Expert in ICV/Calibre runset coding, debugging, QA.
Feb 2017 - Oct 2020
Cad Engineer
Individual contributor for full Chip layout verification for DFM, parasitic extraction, automation support & scripting for physical design EDA tools, CadNavigation, and Technology DRC developer.Independently led the complete physical convergence and TapeIn process of a single die.Orchestrated IP coordination, offering quality feedback to IP design and.
Jun 2015 - Jan 2017
Design Automation Engineer
ASIC Physical design implementation, Development, and testing of Physical Design EDA tools.Script developer to analyze and test design methodologies for Full Chip Layout Place & Route. FEV, PNR, Section Routing and planning
Jun 2014 - May 2015
3 education records
Swapnil Tembhare education
Doctor Of Philosophy - Phd, Nanoribbon/Nanosheet Fet Design For Improved Reliability And Switching Performance
Master Of Technology (Mtech), Vlsi System Design, 8.34 Cgpa
Bachelor Of Engineering - Be, Electrical, Electronics And Communications Engineering, 75.01 %
FAQ
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What company does Swapnil Tembhare work for?
Swapnil Tembhare works for SiClarity.
What is Swapnil Tembhare's role at SiClarity?
Swapnil Tembhare is listed as Director of Technology | R and D at SiClarity.
Where is Swapnil Tembhare based?
Swapnil Tembhare is based in Mumbai, Maharashtra, India while working with SiClarity.
What companies has Swapnil Tembhare worked for?
Swapnil Tembhare has worked for Siclarity and Intel Corporation.
How can I contact Swapnil Tembhare?
You can use AeroLeads to view verified contact signals for Swapnil Tembhare at SiClarity, including work email, phone, and LinkedIn data when available.
What schools did Swapnil Tembhare attend?
Swapnil Tembhare holds Doctor Of Philosophy - Phd, Nanoribbon/Nanosheet Fet Design For Improved Reliability And Switching Performance from Indian Institute Of Technology, Delhi.
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