Project manager manages Exynos 1080 and 1280, 5G mobile processor hardware development team with overall responsibility from 2019 to 2021 .[Journal]T.H Lee, D.Z. Pan, and J.-S. Yang, "Clock Network Optimization with Multi-bit Flip-flop Generation Considering Multi-corner Multi-mode Timing Constraint", IEEE Transactions on Computer-Aided Design, 2017T.H Lee, N.A. Touba, and J.-S. Yang, "Enhancing Test Compression with Dependency Analysis for Multiple Expansion Ratios", IEEE Transactions on Computer-Aided Design, 2016T. H. Lee, I. J. Chang, C. Lee, and J.-S. Yang, "Physical Aware Approaches for Speeding up Scan Shift Operation in SoC", ETRI Journal, 2015[Conference]T.H Lee, D.H Kim, J.S Kim, "Exynos 1080 high-peformance, low-power CPU and GPU with AMIGO" 2021 IEEE Hot Chips SymposiumT.H. Lee, J. Yi, and J.-S. Yang, “Multi-bit Flip-flop Generation Considering Multi-corner Multi-mode Timing Constraint”, Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), 2016[Patent]T.H LEE "Electronic device and method for fabricating semiconductor chip" US20190251222A1T.H Lee "Method of laying out a semiconductor device based on switching activity and semiconductor device produced thereby" US10103715 B2 T.H Lee "Integrated circuit design method reducing clock power and integrated clock gater merged with flip-flops" US 20170061057 A1T.H Lee "Semiconductor devices" US 20200382236 A1

project management, synthesis, sta, and place& routing for mobile SOC