Engineering Manager
Current
Samsung Austin Semiconductor
Mar 2021 - Present
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Talapady Srivatsa Bhat Email & Phone Number
Engineering Manager Device Integration at Samsung Austin Semiconductor
at
Samsung Austin Semiconductor
2 work emails found
@samsung.com
LinkedIn matched
✓ Verified Jun 2026
4 data sources
Profile completeness 100%
Current company
Samsung Austin Semiconductor
Role
Engineering Manager Device Integration at Samsung Austin Semiconductor
Location
Austin, Texas, United States
Who is Talapady Srivatsa Bhat? Overview
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Quick answer
Talapady Srivatsa Bhat is listed as Engineering Manager Device Integration at Samsung Austin Semiconductor at Samsung Austin Semiconductor, based in Austin, Texas, United States. AeroLeads shows a work email signal at samsung.com and a matched LinkedIn profile for Talapady Srivatsa Bhat.
Talapady Srivatsa Bhat previously worked as Engineering Manager at Samsung Austin Semiconductor and Senior Device Engineer at Samsung Electronics. Talapady Srivatsa Bhat holds Ph.D, Materials Science And Engineering from Stony Brook University.
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{first_initial}{last}@samsung.com
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Profile bio
About Talapady Srivatsa Bhat
Responsible for yield improvement, development of optimized processes, systematic sourcing of critical issues SPC, and implementation of process fixes in 300mm semiconductor wafer fabrication. This includes new product installation, process optimization and ramp, yield improvement, customer presentations and problem solving.4 years research experience during Masters and PhD on Material properties and characterization techniques and computational modeling.
Listed skills include Materials Science, Scanning Electron Microscopy, Characterization, Thin Films, and 38 others.
Current workplace
Talapady Srivatsa Bhat's current company
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Samsung Austin Semiconductor
11 roles
Talapady Srivatsa Bhat work experience
A career timeline built from the work history available for this profile.
Senior Device Engineer
Senior Device engineer working on FinFET performance enhancement and new product installation
Jul 2019 - Mar 2021
May 2018 - Jun 2019
Engineer 3
Responsible for new product introduction and ownership of multiple new products during installation and mass production. This includes process development, process optimization and ramp, yield improvement, customer presentations and problem solving.
May 2017 - May 2018
Senior Engineer, Technology And Integration
- Senior Process Integration Engineer, Malta, NY, March 2015-CurrentResponsible for yield improvement, development of optimized processes, systematic sourcing of critical issues SPC, and implementation of process fixes.
- Developed multiple cleans related continuous improvement plans for defect improvement.
- Implemented usage of etch buffer station for processed wafers to resolve defect excursion issue.
- Implemented etch within wafer uniformity improvement to improve sigma by 30%.
- Implemented improved epitaxial growth process enhancement to decrease defects, enhancing yield by 5%.
- Implemented robust epitaxial growth process control techniques to balance device performance and sort yield.
Feb 2015 - May 2017
Senior Process Engineer, Characterization Engineer
- Responsible for epitaxial growth module inline defect detection, defect baseline reduction and excursion control for yield enhancement. This includes daily monitoring of over 300 SPC charts for defect variations and.
- Expertise in process and tool related defects caused during manufacturing.
- Expertise in tool related defect issues in semiconductor manufacturing.
- Implementation of process enhancement for 90% reduction in wafer breakage for line yield improvement.
- Lead for defect limited yield improvement task force for 2 years.
Jan 2013 - Apr 2015
Research Assistant
- Key projects worked on:
- Computational Modeling of Thermal Stress Development in Silicon Single Crystals.
- Computational Modeling of Indentation Analysis of Transversely Isotropic Materials.
- Analysis of Residual Stress Using Instrumented Indentation.
Aug 2008 - Aug 2012
Teaching Assistant
Teaching experience for five semesters: Worked as a teaching assistant for the subjects: (i) Strength of materials, (ii) Thermodynamics of solids, (iii) Electronic materials (iv) Chemical thermodynamics.
Aug 2008 - May 2011
Project Assistant
Accumulative roll-bonding is used to synthesize ultra-fine grained aluminum and aluminum-copper plates with excellent mechanical properties at high temperatures. The properties and microstructure of the material are studied using SEM, TEM and EDX. Extensive grain refinement as well as excellent mechanical properties of the synthesized materials was observed.
Jun 2007 - Aug 2008
Software Developer
Worked on a platform requiring software programming using PERL.
May 2008 - Jul 2008
Intern
Gaetec
GaAs IC’s are fabricated using MOCVD, the defects occurring during the synthesis and processing are studied and the causes for these defects are analyzed. Scanning electron microscopy is used to characterize defects and procedures to reduce defect occurrence are suggested. The analysis and suggested procedures lead to achievement of lower defect levels in.
Dec 2005 - May 2006
4 education records
Talapady Srivatsa Bhat education
Ph.D, Materials Science And Engineering
Stony Brook University
M.S, Materials Science And Engineering
Stony Brook University
Bachelor Of Technology, Material Science And Engineering
National Institute Of Technology Karnataka
High School, Sciences
K. V. Kanchanbagh
FAQ
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Quick answers generated from the profile data available on this page.
What company does Talapady Srivatsa Bhat work for?
Talapady Srivatsa Bhat works for Samsung Austin Semiconductor.
What is Talapady Srivatsa Bhat's role at Samsung Austin Semiconductor?
Talapady Srivatsa Bhat is listed as Engineering Manager Device Integration at Samsung Austin Semiconductor at Samsung Austin Semiconductor.
What is Talapady Srivatsa Bhat's email address?
AeroLeads has found 2 work email signals at @samsung.com for Talapady Srivatsa Bhat at Samsung Austin Semiconductor.
Where is Talapady Srivatsa Bhat based?
Talapady Srivatsa Bhat is based in Austin, Texas, United States while working with Samsung Austin Semiconductor.
What companies has Talapady Srivatsa Bhat worked for?
Talapady Srivatsa Bhat has worked for Samsung Austin Semiconductor, Samsung Electronics, Globalfoundries, Stony Brook University, and Indian Institute Of Science.
How can I contact Talapady Srivatsa Bhat?
You can use AeroLeads to view verified contact signals for Talapady Srivatsa Bhat at Samsung Austin Semiconductor, including work email, phone, and LinkedIn data when available.
What schools did Talapady Srivatsa Bhat attend?
Talapady Srivatsa Bhat holds Ph.D, Materials Science And Engineering from Stony Brook University.
What skills is Talapady Srivatsa Bhat known for?
Talapady Srivatsa Bhat is listed with skills including Materials Science, Scanning Electron Microscopy, Characterization, Thin Films, Tem, Powder X Ray Diffraction, Semiconductor Fabrication, and Matlab.
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