Post-Silicon Validation Engineer- Graduate Intern
Current• Acquiring proficiency in JTAG architecture tools for system access and debugging on IFS Validation Platform.• Developing a strong understanding of the ARM debug interface architecture and SLE (System Level Emulation).• Developed expertise in the DFD domain by performing debug tool checkout on SLE, validating the VISA tool.• Implementing automated scripts, leading to improved regression test-suite execution and system performance. • Enhanced debugging capabilities by developing a Python interface for OpenOCD, enabling hardware debugging.