Mentor, High School Robotics Team at Cesar Chavez High School

+ Qualified over 40 process changes through product reliability across multiple internal and foundry silicon and GaAs providers, meeting business needs, providing on-time delivery of new technologies, and reducing costs.+ Prepared, executed, reviewed, and approved reliability targets and reliability test plan, reports for introduction of new technologies, and improvements of existing technologies for RF products.+ Reviewed foundry reliability and quality reports for compliance to industry, JEDEC, and internal standards, understanding fundamental failure modes and working with supplier quality to resolve gaps and to recommend further testing.+ Performed data analysis on results of accelerated life testing, including RF HTOL, HAST, and temp cycling, determining root cause of failure, initiating improvements, and verifying corrective action requests.+ Managed package-level ESD testing of RF products for development and production, including HBM, MM, CDM, and IEC ESD testing.

+ Designed and certified customer-focused devices within SiGe technologies, including 15GHz PNP, Schottky diode, PIN diode, and various passive components.+ Created technology requirements based on market research analysis and customer requirement analysis. + Supervised and trained device technician.+ Expanded market share by developing SiGe HBT and MOS devices for power amplifier applications encompassing simulation, fabrication, design of experiments, evaluation, model verification, and design libraries for GSM/Edge, and WCDMA applications. + Provided design library support for multiple RF and mixed-signal technologies by providing device design, characterization structures, methods and models for DC, small-signal and large-signal RF, pcells, and design rules in ADS and Cadence by managing cross-functional multinational team. + Met cost reduction goals by introducing experimental packaging methods for RF power SiGe HBTs and MOS devices.+ Shepherded new technology from concept through production implementation, with design kit support, reliability testing, and production ramp. + Developed and maintained wafer process documentation, monitored material flow for timely delivery, generated back-end production paperwork for multiple site and vendor process, and created yield reports.+ Delivered multi-level metal processes for a new SMARTMOS technology node across multiple functional groups, managing schedules, resources, and risk mitigation strategies during multiple changes in project. + Defined and created parameter extraction programs for hand probe and automated collection of process control and modeling data using HP4146, LCR meters, Maury load pull stations, and vector network analyzers, including look-ahead accelerated lifetime testing on CMOS devices, fuses, and resistors.

Flat Panel Division.+ Researched and developed unique technology for video display market and directed daily activities of technician, including training, planning, and management. + Determined business potential of research materials by developing characterization methods for new carbon materials.

Coordinated yield enhancement activities for process consolidation of over 300 power RF bipolar and MOS discrete devices. Achieved flawless conversion of all lines from three-inch to four-inch wafers, with zero impact to global customers, by monitoring and adjusting processes.

+ Developed 0.5 micron BiCMOS technology with power MOS targeted for automotive applications. + Enabled new market introductions by managing projects to certify a new LDMOS and Schottky diode. + Improved performance of bipolar devices critical to new product introduction.

+ Recruited by leadership team to manage training, support activities, and requirements gathering at four company locations within Japan. + Investigated automating analog IC test cycle and developed three proposals for implementation. + Supported integration of GaAs design system into Mentor design tools.