Thomas Kessler Email & Phone Number

Cupertino, California, Us

Koto-Ku, Toyosu, Tokyo, Jp

Modeling, characterization, and development of integrated devices in BCD processes- Characterization and modeling of LDMOS, CMOS, BJT trnssitors, diodes, and passive devices in the company's own semiconductor process- Working with foundry partners to develop new active and passive devices in foundry partner's processes- Working with internal design, reliability, QA, and FA teams and foundry partners on developing new products and resolving product issues- Evaluate foundry processes technologies for use in next generation designs- Direct contact to external customers regarding technology, process, or devices related inquiries and issues- Training and mentoring of new hires

Armonk, New York, Ny, Us

Working closely with representatives of other companies discussing modeling topics and issues

Armonk, New York, Ny, Us

Modeling of SiGe NPN bipolar transistors for analog, wireless, and high frequency applications using Hicum and Vbic models in Spectre, HSpice, and ADS. Duties include:- Parameter extraction for dc, ac, rf, temperature, 1/f noise, and noise figure modeling- Generation of statistical, corner, and mismatch model - Test plan definition for device measurements (dc, ac, s-parameter, 1/f noise, noise figure)- Development of sub-cuircuit and VerilogA based model extensions to improve model accuracy- Test structure definition and layout verification using Cadence- Documentation of model to hardware correlation- Working closely with PDK engineers to ensure correct implementation of extracted models into design kit- Customer support solving model issues by working directly with clients or with company’s application engineers reliability, and characterization engineers to assist in development of new devices- Training and mentoring of new hires, interns, and co-workers

Modeling engineer in a multinational environment for a world leading analog/mixed signal semiconductor foundry. Duties include:- On-wafer measurements (dc, cv, rf, temperature) using IC-CAP- Characterization of primitive devices (MOS and BJT transistors, resistors, capacitors, and diodes) for HV and automotive applications- Working closely with Design Support department to implement extracted models into PDK- Evaluation of new model formulations and supported PDK engineers to implement new models into the design kit- Performing model QA to find and solve model convergence issues- Development of methodology for statistical and corner modeling- Definition of test structures for model extraction- Check test structure layout in the Cadance design environment- Identification of flaws in newly developed devices and providing help to development engineers to solve these problems- Training and mentoring of interns- Provide customer support regarding model related issues- Coordination of characterization activities with fellow engineers across Europe and Asia

Dresden, De

Assistant in various of the university's research projects. Duties include:- On-wafer measurements (dc/ac/temperature) using ICCAP- Modeling of substrate coupling effects in bipolar transistors using an enhanced substrate network partitioning the network into an epi, perimeter, and pure substrate region- Modeling of MOS transistors using a simplified EKV model- Modeling of the electrothermal behavior of modern SiGe transistors- Investigate semiconductor devices on the basis of numerical device simulations using the university´s simulator DEVICE- Investigations of the Generalized integral charge control relation for advanced SiGe HBT technologies- Performing monte carlo simulations on different nSi resistance structures to solve the boltzmann transport equation using the numerical simulator MONJU- Subsequent analysis of measured/simulated data and parameter determination using MATLAB and the transistor dimensioning program TRADICA

Intern with the company's bipolar modeling group, responsible for evaluation and introduction of the HiCUM compact model. Duties include:- On-wafer measurements using ICCAP- Development of transforms/macros within ICCAP to automate parameter checking and scaling check of geometry specific HICUM models- Measurement (dc/cv/ac/temperature) and extraction of the company´s first geometry specific HICUM models for SiGe NPN SOI transistors using the HICUM Aperitif Toolkit (HAT) from XMOD Technologies- Measurement (dc/ac/cv/temperature), evaluation of new HICUM specific test structures, and extraction of the company´s first geometry scalable HICUM models for SiGe low and high voltage NPN transistors using the HICUM Master Toolkit (HMT) from XMOD Technologies- Alignment of wafer case models to process targets and the development of corner models for HICUM- QA test final models in the design environment- Create supporting documentation for his work, share and present to bipolar modeling team