Thomas Pepler Email & Phone Number
@ciena.com
1 phone found area 613
LinkedIn matched
Who is Thomas Pepler? Overview
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Thomas Pepler is listed as Senior Staff Engineer at Marvell Technology, based in Greater Ottawa Metropolitan Area, Canada. AeroLeads shows a work email signal at ciena.com, phone signal with area code 613, and a matched LinkedIn profile for Thomas Pepler.
Thomas Pepler previously worked as Mixed Signal Designer at Ciena and IC Design Engineer at Solantro Semiconductor Corp. Thomas Pepler holds Master Of Applied Science, Electrical And Computer Engineering from Carleton University.
Email format at Marvell Technology
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AeroLeads found 1 current-domain work email signal for Thomas Pepler. Compare company email patterns before reaching out.
About Thomas Pepler
Thomas Pepler is a Senior Staff Engineer at Marvell Technology. He possess expertise in matlab, fpga, c, c++, labview and 11 more skills. Colleagues describe him as "Thomas is a fast learner, driven and motivated. Great work, good details and documentations." and "Thomas was one of the sharpest and smartest coop students among others at Cisco. Thomas has started fresh and quickly adapted to organization's culture. Thomas had an amazing performance during his coop terms. Thomas had a various of duties such as lab support, technical support, test engineering, project management. Thomas was also very proactive during his work term semester. He not only performed well with his assigned tasks but also helped other teams with different projects. Thomas is truly a valuable engineer to any organization."
Listed skills include Matlab, Fpga, C, C++, and 12 others.
Thomas Pepler's current company
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Thomas Pepler work experience
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Mixed Signal Designer
Ic Design Engineer
Research Assistant
Master's level research in the area of digital integrated circuit design for radio-frequency applications under the supervision of Dr. Calvin Plett.Thesis: Automated Pipelining for Clocked CMOS Logic and FPGAs- Developed pipelining/register delay balancing algorithm, implemented in Perl- Designed CIC DSP filter as application for algorithm, implemented in IBM 130 nm CMOS- Designed 16-QAM modulator to demonstrate algorithm, implemented on Xilinx Virtex-5
Researcher
Continued research on 4th year project work, with a grant from the Department of Electronics:- Researched boost converters for driving an electroluminescent (EL) display.- Began development of a high voltage NMOS SOI process for the Carleton MicroFab. The device physics and process were investigated with MInimos-NT and Synopsys' Sentaurus process simulation suite.
Hardware Engineering Support, Co-Op
Was tasked with various duties to support activities in the large-scale core routers’ labs:- bring up newly arrived prototype PCBs (initialize FPGA images supplied by hardware engineers, apply latest settings to programmable power supply controllers, etc.)- testing of new prototype boards (software diagnostics and JTAG testing)- significant contributor to the oversight and execution of the failure modes and effects analysis (FMEA) projects for several prototype cards- helped debug existing boards belonging to software testing groups- perform rework on boards (replacing resistors, capacitors, and chips with several pins) in support of the above- using databases to keep track of prototype boards (working status, rework revisions, physical location, etc.), and keep inventory on optical modules (e.g.: SFP, XFP, CFP) for testing groups- provide some support to software engineers by installing new equipment into racks and configuring it
Hardware Engineering Support, Co-Op
Support engineers working in the lab by:- using databases to keep track of prototype boards (working status, rework revisions, physical location, etc.)- bring up newly arrived prototypes (initialize FPGA images on boards, apply latest settings to programmable power supply controllers, etc.)- perform rework on boards (replacing resistors, capacitors, and chips with several pins)- provide some support to software engineers by installing new equipment into racks and configuring it
Electrical Engineering Co-Op
Develop a LabVIEW application to control a 4-axis scanning table used for various Aerospace Non-Destructive Evaluation applications.
Thomas Pepler education
Master Of Applied Science, Electrical And Computer Engineering
Bachelor Of Engineering (B.Eng.), Electrical And Electronics Engineering
Frequently asked questions about Thomas Pepler
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What company does Thomas Pepler work for?
Thomas Pepler works for Marvell Technology.
What is Thomas Pepler's role at Marvell Technology?
Thomas Pepler is listed as Senior Staff Engineer at Marvell Technology.
What is Thomas Pepler's email address?
AeroLeads has found 1 work email signal at @ciena.com for Thomas Pepler at Marvell Technology.
What is Thomas Pepler's phone number?
AeroLeads has found 1 phone signal(s) with area code 613 for Thomas Pepler at Marvell Technology.
Where is Thomas Pepler based?
Thomas Pepler is based in Greater Ottawa Metropolitan Area, Canada while working with Marvell Technology.
What companies has Thomas Pepler worked for?
Thomas Pepler has worked for Marvell Technology, Ciena, Solantro Semiconductor Corp, Carleton University, and Cisco Systems.
How can I contact Thomas Pepler?
You can use AeroLeads to view verified contact signals for Thomas Pepler at Marvell Technology, including work email, phone, and LinkedIn data when available.
What schools did Thomas Pepler attend?
Thomas Pepler holds Master Of Applied Science, Electrical And Computer Engineering from Carleton University.
What skills is Thomas Pepler known for?
Thomas Pepler is listed with skills including Matlab, Fpga, C, C++, Labview, Verilog, Pspice, and Electronics.
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