Thomas Seitz Email & Phone Number

Huntsville, Alabama Area

• Responsible for memory synchronization subunit within the MMU unit.• Develop RTL feature implementations from initial design to final tapeout.• Update and improve various aspects of the memory structure such as caches, compression logic, and fault logic.• Write and run tests to verify accuracy, timing, and power of designs.• Investigate and resolve testing holes in unit test coverage.• Collaborated with multiple teams to complete chip design on time

Huntsville, Alabama, United States

Auburn, Alabama, United States

• Created an analysis script that analyzed the performance of circuits at near 0-degree temperatures.• Designed and simulated custom digital chip schematics and layouts using Cadence• Created behavioral models and simulations with Verilog• Designed controlled impedance PCB for custom integrated circuits