Thomas Teixeira Email and Phone Number

Lead design and implementation of Corero's new DDoS protection product. Multicore implementation using C and a custom IDL for reliability, scalability, portability, maintainability and decreased development time. This replaced a legacy IPS product with data path mostly written in assembly language. Introduced use of software analytic and debugging tools to identify and fix multiprocessor race conditions in control plane. Co-inventor on three patents issued by the US patent office.

System Architect for vision analytics product. Determining hardware platform to meet performance requirements at minimal cost. Working with systems group to determine architecture for integrating the former IntelliVid product with existing American Dynamics digital and network video recorders.

Intellivid Tracker software implements intelligent vision processing of surveillance video across multiple cameras for retail stores, improving the efficiency of loss prevention staff and reducing losses due to theft. Specify hardware platform based on clusters of standard PC hardware and software components including Linux, Postgresql, processor, motherboard, memory and disks. Calculate expected performance under load including CPU, I/O, database. Analyze and improve performance (through improved algorithms, or hand optimizations using MMX, SSE). Implemented software installation procedure that installs operating system and application software. Estimate reliability (MTBF) of overall system and propose changes to software architecture to allow better reliability, and scalability and lower cost of goods sold

Defined overall product architecture and worked with various technical leaders to assure that detailed designs modules fit well together. Defined high-level concepts of virtual and global servers and services supporting highly available adaptive resource networking. Intelligent layer 4 protocol switching for storage access protocols including NFS, CIFS protocols and CIFS authentication. Principal author of two provisional patent applications filed with the US Patent Office.

Identified customer and technical requirements for gateway products integrating InfiniBand technology with existing infrastructure. Developed an architecture for connecting FibreChannel SANs to InfiniBand using SRP (SCSI RDMA Protocol) and analyzed computing resources necessary to saturate a single InfiniBand 4x link. Analyzed software and InfiniBand host channel adapters (HCA) for compatibility with Paceline Systems' InfiniBand switch for high performance computing applications.

Responsible for development, documentation and quality assurance with a staff of 35 to 40 engineers and annual budget of four million dollars. All product development milestones including beta tests and product releases were met within two weeks of the initially established target dates. Worked with an outside agency to obtain export classification for Mangosoft’s MIND product.

Completed final release of AltaVista Firewall and Tunnel after Compaq sold these to Axent and transferred the development staff. Reduced the number of outstanding escalated customer problem reports from sixty in June 1999 to less than fifteen by March 2000. Responsible for ongoing engineering support of the AltaVista security products, Raptor EC products (the renamed products), development of the port of Axent’s Raptor Firewall and PowerVPN to Compaq’s Alpha Tru64 UNIX platform, and portions of Axent’s future Firewall and VPN development.

Managed twenty six engineers in the US and Ireland. Participated in negotiations with various potential partners to purchase these products from Compaq providing technical information on the Alta Vista products and information about personnel and software engineering practices.Technical director for Alta Vista security software products. Responsible for technical and business product strategy; product quality including development and testing process.

Architecture, design and implementation of distributed systems for high availability Internet servers and gateways providing load balancing among multiple servers, detection of failing servers and automatic fail-over to other servers, replication of content and configuration information and secure remote administration.

Advanced Products division of Oki America.Responsible for all development by a team of 15 to 25 hardware and software engineers. Porting 3D graphics software library (PEX); porting 3D graphics applications software (AVS from Advanced Visual Systems); design and develop 3D graphics accelerator ASIC for VL-bus and PCI; design and develop audio/video capture card for VL-bus. The 3D graphics accelerator ASIC, TrianGL, was selected by Microsoft for the initial sample 3D-DDI device drivers for Windows NT. Other areas of investigation included architectures for MPEG encode/decode, video compression/decompression for teleconferencing, graphics and system chip set architecture for unified memory for Intel x86 systems. Developed a family of compact, highly portable personal readers for Smart Cards, particularly for electronic commerce “digital money” or “stored value” applications. OAPD’s ValueChecker™ was the market leader for personal smart card readers in Europe and was used with all major stored value smart cards include Proton, Visa Cash, MasterCard Cash and Mondex. As Vice President of Business Planning, responsible for coordinating business plans among OAPD’s Electronic Commerce, TrianGL and System products. Responsible for market and technology research projects for Oki Electric’s Computer and Network Systems Group and Multimedia Business Planning Group.

Responsible for all software engineering including operating systems, communications, graphics, visualization software, compilers and language tools, documentation, software release and system administration. Activities included setting strategic direction, prioritizing work, executing development plans, budgeting and scheduling. Major accomplishments included development of a desktop MIPS-based system and a high performance graphics accelerator with advanced rendering features; delivery of an i860-based desktop system; beta test of a 3D graphics accelerator using i860’s for 3D rendering and image processing; release of a new version of AVS, a visual programming tool kit for scientific visualization applications, on all Stardent platforms and industry leading 3D platforms; Stardent took a leading role in demonstrating PEX interoperability at SIGGRAPH 1991; optimizing internal computer networks to improve performance and reliability.

Lead a team porting Unix to custom multiprocessor CPU with vector processing and 3D graphics acceleration. Extended Unix with light weight process semantics, many of which formed the basis for later standardization by Unix International and Posix.