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@adaptrum.com
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Thomas Young is listed as Sr. Staff Engineer and Team Lead at Adaptrum, based in San Mateo, California, United States. AeroLeads shows a work email signal at adaptrum.com and a matched LinkedIn profile for Thomas Young.
Thomas Young previously worked as Sr. Digital Engineer at Finsix Corporation and Co-Founder at Cloudvue Technologies. Thomas Young holds Master Of Science (M.S.), Electrical And Electronics Engineering from San José State University.
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AeroLeads found 1 current-domain work email signal for Thomas Young. Compare company email patterns before reaching out.
Experienced Senior Staff Engineer with a demonstrated history of working in the information technology and services industry. Skilled in SystemVerilog, Firmware, Hardware Architecture, Imaging Processing, Digital Signal Processors, and System on a Chip (SoC). Strong information technology professional with a Master of Science (M.S.) focused in Electrical and Electronics Engineering from San Jose State University.
Listed skills include Verilog, Asic, Soc, Fpga, and 34 others.
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A career timeline built from the work history available for this profile.
San Jose, CA, US
. Lead design team to integrate and verify Adaptrum base band processor into AXI fabric based SOC. Design GPS synchronization among base stations for wireless communication in TV white space. Design memory token, share memory, mail box for multiple base band processors for sharing resources. Design of RTL to enhance for multiple-user from single-user.
Menlo Park, CA, US
. Designed and module verified the physical layer of the USB-C power delivery specification. Implemented the AHB wrapper logic for Flash and NVM IP in next generation mix-signal IC. Integrated ARM Cortex M0 core and building AHB bridges to communicate internal Finsix logic. Worked with analog engineers to come up unique power up sequence controlled by.
. Designed next generation of Cloud Computing chip with improved visual quality and bandwidth. Implemented and verifying a new 2D engine with new up and down scaling capabilities. Upgraded from previous DDR2 IP to newer DDR3; PCIE1.0 IP to newer PCIE2. Integrating H.264 video decoder IP with AXI interface for Microsoft Window 8 requirement. Wrote test.
Redmond, Washington, US
Defined and designed various blocks inside the RemoteFX server and client hardware including. Discrete Waveform Transform, Quantization, Run-Length,. RGB/YUV display & cursor unit, color space conversion,. DMA, buffer management unit, MIU wrapper with arbitration logic for DDR2 IP. An external host bus interface unit which communicated with the ARM-9 based.
US
. Prototyped various hardware modules using Virtex5 and Spartan3 FPGA. Designed wavelet codec engine, cross-bar fabric, memory and display controller in Verilog
. Designed internal blocks and integrated external IPs in a SOC for the cell phone media accelerator.. Based on AMBA 2.0 bus architecture with a SRAM controller, display unit, audio unit, DMA, 2D. Integrated IPs including SDCARD interface, NDFLASH interface, TV Encoder, USB 2.0 OTG controller
US
. Defined, implemented, verified, and debugged the VLD in both the CAVLC and CABAC. Partitioned and created a boundary between firmware code and above VLD. Coded VLD test bench with PLI interface to initialize VLD parameters for testing
. Synthesized design from RTL to gate; Performed functional validation between RTL and gat. Stitched scan chains together for scan; Used static timing tool to analyze the full chip
Defined and designed the Egress Storage and the Local Buffer Manager ASIC for OC-192 LCWrote testbench and verified features in Traffic Manager ASIC for OC-48 LC
US
Defined, designed, and verified 3D, 2D, MPEG, Display in the S3’s Savage family products Designed test version of graphic card to test S3 1st generation graphic accelerator
Santa Clara, California, US
Defined, designed validation test vehicles for various 486 and Pentium processors.Wrote test vectors on Trillium tester for mix signals modem chip
CA
Created simulation model for Apple Link which interfaced between Macintosh and Micro-Vax.
Quick answers generated from the profile data available on this page.
Thomas Young works for Adaptrum.
Thomas Young is listed as Sr. Staff Engineer and Team Lead at Adaptrum.
AeroLeads has found 1 work email signal at @adaptrum.com for Thomas Young at Adaptrum.
Thomas Young is based in San Mateo, California, United States while working with Adaptrum.
Thomas Young has worked for Adaptrum, Finsix Corporation, Cloudvue Technologies, Microsoft, and Calista.
You can use AeroLeads to view verified contact signals for Thomas Young at Adaptrum, including work email, phone, and LinkedIn data when available.
Thomas Young holds Master Of Science (M.S.), Electrical And Electronics Engineering from San José State University.
Thomas Young is listed with skills including Verilog, Asic, Soc, Fpga, Debugging, Embedded Systems, Rtl Design, and Xilinx.
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