Design a Bus Master DMA with PCIe and AHB interfaces using Xilinx FPGA.Accomplish a high-bandwidth, flexible and reliable data transfer channel at rates of 10Gbps, which is fully extensible.Transplant and upgrade AMBA bus module and DDR2 controller using Xilinx FPGA.Design the AMBA module with 32-bit address bus and 64-bit data bus, which support burst operation;Implement DDR2 controller with AHB interface and optimize system timing and performance to meet the needs of a variety… Show more Design a Bus Master DMA with PCIe and AHB interfaces using Xilinx FPGA.Accomplish a high-bandwidth, flexible and reliable data transfer channel at rates of 10Gbps, which is fully extensible.Transplant and upgrade AMBA bus module and DDR2 controller using Xilinx FPGA.Design the AMBA module with 32-bit address bus and 64-bit data bus, which support burst operation;Implement DDR2 controller with AHB interface and optimize system timing and performance to meet the needs of a variety of access. Show less

Set up the verification environment with vsp100 system with Altera FPGA.Debug and verify the functions of demo board based on vsp100 chip with Quartus and ModelSim.Fix bugs after verification to improve the chip’s performance.Verify and debug OpenRISC CPU, WISHBONE Bus and other IP cores on Altera FPGA platform.Build high-performance and low-power implementations in nm process.Implement a SoC based on OpenRISC by structured ASIC (eASIC).