Tim Coffman

Tim Coffman Email and Phone Number

Program Management and Technology Professional (Retired)
Tim Coffman's Location
Austin, Texas, United States, United States
Tim Coffman's Contact Details

Tim Coffman work email

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n/a
About Tim Coffman

Program Manager: Led complex technology and product development effortsSenior Program Manager Nonvolatile IPProject Manager for Discovery Labs and CTO officeProject Management of hardware core and software libraries for the Vector Signal Processing Architecture (VSPA core) Technology node manager for 16nm, 40nm, 55nm, and 90nm at FreescaleProject manager for: Freescale/ST Microelectronics Joint Development, International joint development between Nanya/Infineon/Inotera for 90nM 1G DDR-II SDRAM, TI/RAMBUS 256M RDRAM, Ford/TI custom productEngineering Manager: Directed all aspects of Integrated Circuit development, including strategic direction, staffing, project management, yield improvement, and interfacing with customers and executive managementCoordinated international projects and trained engineers in VLSI designDirected a staff of more than 24 engineering professionalsEstablished, staffed, and managed US design centerTechnical Leadership: 24 US and multiple foreign patents.Author of 16 publications and conference presentationsRecognized as key corporate contributor and elected to technical laddersResponsible for development of over 40 products from concept through successful productionExtensive IC design work with digital/memory products (EPROM, FLASH EPROM, DRAM, RDRAM, SRAM, and other logic such as USB RISC processor). Specified and developed design kits/rules and verification decks for multiple technologies and tool formats Career Overview:NXP Semiconductor, Sr. Program ManagerFreescale Semiconductor, Program Manager/Strategy Nanya Technology, Design Manager Texas Instruments, Project Manager/ Design Manager

Tim Coffman's Current Company Details

Program Management and Technology Professional (Retired)
Tim Coffman Work Experience Details
  • Nxp Semiconductors
    Sr. Program Manager
    Nxp Semiconductors Nov 2017 - Apr 2020
    Austin, Texas Area
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  • Nxp Semiconductors
    Sr. Program Manager
    Nxp Semiconductors Dec 2015 - Jul 2016
    Austin, Texas Area
    Project Management for Discovery Labs (NXP's high-risk/high-reward intrapreneurial innovation lab).◻ Project Management for multiple advanced R&D projects.◻ Contract and compliance management◻ Contingent worker sponsorship◻ Monthly project progress reviews
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  • Freescale Semiconductor
    Program Manager
    Freescale Semiconductor Aug 2014 - Dec 2015
    Austin, Texas Area
    Distinguished Member of Technical Staff responsible Project Management for Discovery Labs (Freescale's high- risk/high-reward intrapreneurial innovation lab). Also responsible for the following through January of 2015 - Project Management of hardware core and software libraries for the Vector Signal Processing Architecture (VSPA core) used in AFD4400 - the first fully software-programmable Digital Front End (DFE) System-on-Chip (SoC) for cellular base station radios. Coordinated weekly CTO staff meetings and monthly CTO project reviews◻ Project Management for multiple advanced R&D projects.◻ Lab equipment / supply management◻ Project Management for CPU Core hardware design and software support libraries.◻ Coordination of weekly CTO staff meetings and monthly CTO project reviews
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  • Freescale Semiconductor
    Program Manager/Ip Strategy
    Freescale Semiconductor Oct 2005 - Aug 2014
    Austin, Texas Area
    Distinguished Member of Technical Staff responsible for technology node enablement including PDK and embedded IP (Library and Memories). Managed 16nm, 40nm, 55nm, and 90nm technology nodes. Led technology requirements definition and node selection for Kinetis microcontroller family. Central team coordinator for ST/Freescale Automotive joint development program. Primary strategic focus was on embedded Nonvolatile memory IP. Developed and maintained foundation level IP roadmaps for stdCells, SRAM/ROM, and NVM solutions.Developed product requirements for new embedded IP design programs. Tracked new product initiatives to ensure required components are provided on time. Lead business unit interlock meetings to review status, issues, priorities, and roadmaps.◻ Program management for leading edge technology nodes.◻ Strategy, roadmaps, and requirements definition for embedded foundation IP.◻ Key driver in next-generation Consumer/Industrial technology node and IP selection◻ Primary foundation IP interface in Freescale business alliance with ST Microelectronics.
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  • Nanya Technology
    Design Manager
    Nanya Technology Oct 1998 - Jun 2005
    Houston, Texas Area
    Established, staffed, and managed US design center for Taiwan based semiconductor company. Specified and outfitted physical office space for Houston design center. Arranged office layout, electrical, and communications infrastructure. Hired and direct engineering and office staff of more than two dozen VLSI engineers, physical layout designers, CAD engineers, and administrative personnel. Defined design flow and negotiated purchase of software and systems. Directed IC design team and participated in design effort by making final architecture decisions, performing circuit design, and layout as needed. Program manager of joint design activity between Nanya/Infineon.◻ Establish US Office: Define office space requirements, identify property, and negotiate lease and build-out. Negotiate and purchase office equipment, furniture and supplies.◻ Enable Design Capability: Identify and hire engineering staff. Define design methods and flow. Select and negotiate engineering hardware and software tools. Transferred IBM and Infineon design data and flow into compatible industry standard tools. Items include schematic, simulation, layout, and verification tools.◻ Design Projects: 0.09uM DDR-II 1Gb DRAM, 0.11uM DDR-II/DDR 1Gb DRAM. 0.14uM 512Mb SDRAM and DDR SDRAM. 0.2uM 128Mb and 0.125uM 512Mb SDRAM and DDR SDRAM. Custom 0.2uM embedded memory. Design 0.175uM 16Mb SDRAM. Define and design 0.175uM USB & P/S2 mouse controller with embedded RISC processor.
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Tim Coffman Skills

Project Management Semiconductors Ic Cmos Integrated Circuit Design Vlsi Flash Memory Asic Mixed Signal Semiconductor Industry Analog Silicon Physical Design Circuit Design Embedded Systems Low Power Design Static Timing Analysis Integrated Circuits System On A Chip Application Specific Integrated Circuits Very Large Scale Integration

Tim Coffman Education Details

  • Missouri Institute Of Technology
    Missouri Institute Of Technology
    Electronics Engineering Technology

Frequently Asked Questions about Tim Coffman

What is Tim Coffman's role at the current company?

Tim Coffman's current role is Program Management and Technology Professional (Retired).

What is Tim Coffman's email address?

Tim Coffman's email address is ti****@****nxp.com

What schools did Tim Coffman attend?

Tim Coffman attended Missouri Institute Of Technology.

What skills is Tim Coffman known for?

Tim Coffman has skills like Project Management, Semiconductors, Ic, Cmos, Integrated Circuit Design, Vlsi, Flash Memory, Asic, Mixed Signal, Semiconductor Industry, Analog, Silicon.

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