Tim Coffman Email & Phone Number

Austin, Texas Area

Austin, Texas Area

Project Management for Discovery Labs (NXP's high-risk/high-reward intrapreneurial innovation lab).◻ Project Management for multiple advanced R&D projects.◻ Contract and compliance management◻ Contingent worker sponsorship◻ Monthly project progress reviews

Austin, Texas Area

Distinguished Member of Technical Staff responsible Project Management for Discovery Labs (Freescale's high- risk/high-reward intrapreneurial innovation lab). Also responsible for the following through January of 2015 - Project Management of hardware core and software libraries for the Vector Signal Processing Architecture (VSPA core) used in AFD4400 - the first fully software-programmable Digital Front End (DFE) System-on-Chip (SoC) for cellular base station radios. Coordinated weekly CTO staff meetings and monthly CTO project reviews◻ Project Management for multiple advanced R&D projects.◻ Lab equipment / supply management◻ Project Management for CPU Core hardware design and software support libraries.◻ Coordination of weekly CTO staff meetings and monthly CTO project reviews

Austin, Texas Area

Distinguished Member of Technical Staff responsible for technology node enablement including PDK and embedded IP (Library and Memories). Managed 16nm, 40nm, 55nm, and 90nm technology nodes. Led technology requirements definition and node selection for Kinetis microcontroller family. Central team coordinator for ST/Freescale Automotive joint development program. Primary strategic focus was on embedded Nonvolatile memory IP. Developed and maintained foundation level IP roadmaps for stdCells, SRAM/ROM, and NVM solutions.Developed product requirements for new embedded IP design programs. Tracked new product initiatives to ensure required components are provided on time. Lead business unit interlock meetings to review status, issues, priorities, and roadmaps.◻ Program management for leading edge technology nodes.◻ Strategy, roadmaps, and requirements definition for embedded foundation IP.◻ Key driver in next-generation Consumer/Industrial technology node and IP selection◻ Primary foundation IP interface in Freescale business alliance with ST Microelectronics.

Houston, Texas Area

Established, staffed, and managed US design center for Taiwan based semiconductor company. Specified and outfitted physical office space for Houston design center. Arranged office layout, electrical, and communications infrastructure. Hired and direct engineering and office staff of more than two dozen VLSI engineers, physical layout designers, CAD engineers, and administrative personnel. Defined design flow and negotiated purchase of software and systems. Directed IC design team and participated in design effort by making final architecture decisions, performing circuit design, and layout as needed. Program manager of joint design activity between Nanya/Infineon.◻ Establish US Office: Define office space requirements, identify property, and negotiate lease and build-out. Negotiate and purchase office equipment, furniture and supplies.◻ Enable Design Capability: Identify and hire engineering staff. Define design methods and flow. Select and negotiate engineering hardware and software tools. Transferred IBM and Infineon design data and flow into compatible industry standard tools. Items include schematic, simulation, layout, and verification tools.◻ Design Projects: 0.09uM DDR-II 1Gb DRAM, 0.11uM DDR-II/DDR 1Gb DRAM. 0.14uM 512Mb SDRAM and DDR SDRAM. 0.2uM 128Mb and 0.125uM 512Mb SDRAM and DDR SDRAM. Custom 0.2uM embedded memory. Design 0.175uM 16Mb SDRAM. Define and design 0.175uM USB & P/S2 mouse controller with embedded RISC processor.