Tim Coyle Email & Phone Number

Miami, Fl, Us

Sunrise, Fl, Us

• Promoted from Systems Engineer to Senior Systems EngineerSystems Engineer responsible for full product life cycle from architecture to manufacturing of RF, Analog, and Digital productsResponsibilities:● RF Architecture design including frequency planning, cascade analysis, link budget analysis● System Architecture including system modeling, customer requirements, block diagrams, trade-off studies, power and thermal analysis, DVT test plan and manufacturing support● Schematic, PCB Stackup, Design Rules, PCB Layout Rules and Routing Guidelines ● Signal and Power Integrity for DDR4/LPDDR4/SATA/SerDes Up to 100GbE● System Bring Up, DVT, and ManufacturingSkills/Tools● Schematic Capture and PCB Layout (PADS, Allegro, Altium, KiCad)● Lab Measurement for RF/Analog/Digital/DDR/SerDes using spectrum analyzer, VNA, mixed-signal oscilloscope● Test Automation using Python

Worked with a small startup on a software defined radio (SDR) platform for harsh environment temperature sensors. Designed, analyzed, and tested various antenna structures using antenna software and VNA test equipment. Performed PCB schematics and layout of various RF circuits and antennas. Designed prototype radar application in GNU Radio and C++ on dedicated hardware with GUI interface developed with Qt framework. ● Designed new embedded platform for signal processing that reduced costs by 80% and size by 75%● Reduced development time by 6 months using GNU Radio for algorithm development before converting to C++ application● Setup process flow to simulate, design, and measure antennas for pre-production● Mentored junior engineers and acted as technical lead on projects working with external customers

Palo Alto, California, Us

Individual technical contributor supporting Signal Integrity/Power Integrity analysis of DDR PHY and SerDes PHY across organization. Developed system level (chip+package+board) flow to evaluate package power delivery performance. Performed Signal Integrity analysis on low-cost consumer designs including 2-layer and 4-layer PCB designs and 20+ layer PCB designs.● Developed system level approach to evaluate power delivery performance of various package designs allowing for more cost-effective packages to be used while still meeting power rail requirements ● Setup chip modeling flow for power delivery analysis using IBIS 5.0 Power Aware models and Chip Signal Models (CSM) ● Evaluation on DRAMs to support memory controller including chip ballout, breakout routing studies, and protocol/functional verification for JEDEC memory compliance that led to solving customer board layout issues● SerDes SI and PI analysis for Switch Products● Other tasks include PCB stackup design, layout review, EMI simulation, lab verification and correlation

Managed small team of software and hardware engineers overseeing client projects. Provided business and technical solutions for embedded hardware design and Signal Integrity/Power Integrity. Subject Matter Expert on Signal Integrity and EMC including patent analysis work.● Provided independent analysis and technical solution for client project that involved clock jitter issue due to poor power delivery network design. Client was able to fix jitter issue before tape out. Traveled to client site and gave training and technical guidance on setting up a power delivery flow.● Developed and licensed PCB CAD application for Signal Integrity to clients in semiconductor industry and grew software sales to 25% of total company revenue in 2 years. Led software development in Java language for enterprise software market while managing small team of software developers.● Created training program for engineers on Signal Integrity and delivered on-site training to Fortune 500 clients across the globe and introduced eLearning video format with screen capture technology to further increase client base. Designed and launched a digital magazine for hardware engineering industry that included technical articles authored by industry leaders and published four issues that generated over 3000 downloads per issue.● Worked on various prototypes for embedded designs developing firmware and circuit analysis to PCB schematic and layout.● Performed Signal Integrity and EMC analysis on numerous client projects as technical lead and Subject Matter Expert (SME).● Managed PCB design and layout engineers for various client projects.

San Jose, Ca, Us

Design and support for product line of interface chips including PCI, PCI-Express, RapidIO, Ethernet, and DDR2/3. Worked with other board designers and architects to evaluate system protocol efficiency and implementation in hardware through various activities.● Performed Signal Integrity and EMC analysis on DDR2/3 interfaces and other critical interfaces to deliver board routing guidelines to hardware team. ● Supported field application team with customer related issues. ● Implemented Power Integrity analysis methodology for mixed-signal chips including SerDes and parallel DDR3 interfaces by developing power delivery requirements through simulations with Speed2K and SiWave resulting in target impedance profiles

Santa Clara, California, Us

Worked in a hardware design team creating products for set top boxes and digital televisions as main Signal Integrity and EMC resource across hardware and silicon design teams. Performed hardware and embedded design activities for multiple products. This role started out as a contract position and turned into a full-time position.● Worked with PCB designers in the group to ensure Signal Integrity goals were met from PCB stackup design through topology selection and routing. Generated platform design guidelines for all interfaces including PCI Express, HDMI, and DDR3 through Signal Integrity simulation for noise and timing margin.● System architecture implementation and component evaluation for platform performance goals● PCB Schematics and Layout Ex. Designed front panel interface for PCB board using Cadence Allegro PCB toolset● Assisted with lab debugging/bring-up activities

Palo Alto, Ca, Us

Worked in hardware team supporting development of blade servers for server market. Hardware design and analysis of systems including power distribution and electrical interfaces. ● Analyzed systems for Signal Integrity and EMI in blade server market● Provided board layout rules to meet specified timing and noise margins● Lab verification of boards using test equipment and correlation to simulation to ensure design margin

Application engineer with a focus on Signal Integrity supporting communication and interface product lines including LVDS. Worked with team members to do PCB evaluation boards, bench testing, and support customers.● Worked closely with circuit designers to define buffer IO characteristics for optimal analog performance● Supported customer designs with PCB Signal Integrity simulation and routing recommendations● Created and verified IBIS behavioral models for multiple business units with focus on high-speed LVDS products including SerDes● Performed pre-layout simulation and analysis on test and evaluation boards, post-layout analysis including lab verification using TDR equipment

Phoenix, Arizona, Us

Member of the applications group supporting customers for logic and interface products. Performed bench evaluations, created PCB reference designs, generated data sheets, and supported customers.● Circuit simulation support for design group on analog interface products● Provided SPICE and IBIS behavioral models to customers for logic and interface products including GTLP and LVDS● Wrote perl scripts and Java programs to help automate simulation model generation process● Supported customer signal integrity issues through simulation and lab verification of high-speed backplanes and interconnects