Timothy Chesnut Email & Phone Number

Austin, Texas, United States

• Facilitated seamless technical collaboration across cross-functional teams including Front-End Integration, Product Engineering, Quality, Process Change Action Board, Business Units, Design, Planning, and Procurement.
• Spearheaded initiatives as the primary liaison between internal and external foundry technical teams, driving yield, identifying root causes, and implementing corrective actions across diverse processes such as 90LP.
• Spearheaded initiatives as the primary liaison between internal and external foundry technical teams, driving yield, identifying root causes, and implementing corrective actions across diverse processes such as 90LP.
• Orchestrated engineering wafer delivery and product performance, focusing on run path widening, yield improvement, and reliability enhancement.
• Supported over 100 process change actions, implementing additional tools, cycle time reductions, and process improvements to drive yield enhancements.
• Sustaining foundry product owner for twenty-three products and backup to others, ensuring continuity and reliability. Show less

• Foundry Engineering Manager interface among Business, Quality, and Product Engineering Groups, liaising with Taiwanese, Singaporean, and French foundries, and a Malaysian gold bump house, overseeing RADAR, networking.
• Monitored yields and swiftly alerted foundries to potential issues to maintain focus on product yields and quality.
• Consolidated NPI tapeout and quarterly engineering spend forecasts, providing… Show more
• Consolidated NPI tapeout and quarterly engineering spend forecasts, providing insights for vital operational planning.
• Cross-trained employees for seamless product handoffs, enhancing team efficiency and collaboration.
• Played a pivotal role in resolving complex technical challenges, including an automotive customer’s wire bond issue and improving the endurance test results through die coating evaluation activities. Show less

• Nurtured a seamless support interface between Business Groups and Taiwanese fabs, ensuring alignment on 0.18 / 0.13 µm Logic processes, capacity, pricing, and quality standards to meet business objectives.
• Collaborated with Business Groups and R&QA to reinforce qualification plans, overcoming obstacles to device tapeouts, qualifications, and foundry production ramping.
• Drove cost reduction, optimizing test platforms, reducing cycle times, and enhancing yields to drive… Show more
• Drove cost reduction, optimizing test platforms, reducing cycle times, and enhancing yields to drive profitability.
• Contributed to cost reduction efforts with respect to test platform, cycle time reduction, and yield enhancement. Show less

• Executed diverse responsibilities as a Product Engineer, overseeing probe test, final test, product documentation, failure analysis, and software checkout.
• Supported Marketing, Customer, R&QA, Assembly, offshore product transfers, and wafer fabrication interfacing.
• Device Engineering: Owner of wafer probe and Product Engineering interfacing for HiP4S 0.25 µm CMOS SRAM.
• Key player in achieving 50% test time reduction for the 256K SRAM resulting in saving over… Show more
• Key player in achieving 50% test time reduction for the 256K SRAM resulting in saving over $2M.
• Contributing member to the "Dry Etch Sequencing Induced Gate Oxide Degradation Due to Metallic Contamination in 0.25 µm CMOS Manufacturing" (International Electron Devices Meeting, 1998). Show less