Timothy Tran Email & Phone Number

Milpitas, CA, US

Santa Clara, CA, US

• Successfully managed Design-Bid-Build and installed a MOCVD Aixtron reactor including Transfer Module, Abatement systems (Chlorine, Ammonia), Chiller, RF Generator, and other auxiliary support equipment. Obtained.
• Perform in-house design and/or manage design-build efforts with external contractors or engineering consultants for tool installation of small to medium sized infrastructure projects
• Hold design reviews with external design firms at various stages of the design and permitting process and identify value engineering opportunities. Determine best means of execution for various projects including.
• Track infrastructure capacity including N+1. Support Operations & Maintenance team in troubleshooting and continuous improvement projects related to HVAC, Electrical, Mechanical and Plumbing. Provide budgetary.
• Determine most cost-effective method form of bidding for given project including lump sum, GMP, or T&M NTE. Develop scope of work, bid documents, and hold contractor job walks to obtain competitive pricing for a.
• Manage selected contractor’s activities. Ensure adherence to safety standards, code compliance, workmanship, materials selection, adherence to site standard specifications, and quality. Review and respond to submittals.

• Managed construction of varied facilities/infrastructure related projects supporting Apps Lab in Buildings 81 & 85 at AMAT.
• Successfully completed construction of minor and major facilities infrastructure e.g. Upgraded Solvent Exhaust, FICW system, PCW system; Replaced sanitary sewer line; Installed new equipment in Athena Lab, SFEM FI.
• Installed and/or removed semiconductor processing tools in R&D facilities e.g. chamber, FI, pump, chiller, gas lines, etc.
• Supported moderate building facilities activities including, but not limited to, expansions, consolidations, and improvements.
• Performed detailed coordination of construction: Obtain construction bids from approved suppliers; Develop budget; Obtain permits; Develop appropriate Purchase Requisitions; Coordinate construction activities.

Fremont, CA, US

- Worked in fast-paced R&D (Advanced Technology Development Group)- Successfully developed novel SCD/ALE PR treatment for EUV patterning to improve LCDU (Local CD Uniformity) to <1.4nm 3σ in both ICP (Kiyo EX) and CCP (Flex GL) tools through Lam/ASML JDP. Applied to TSMC N5 via demo on Flex GL and achieved 1.5nm 3σ LCDU. Co-authored in published paper..

Fremont, CA, US

- Leading etch process engineer responsible for all CIC (Customer Integration Center) projects pertaining to etching (DE: Flex EL/FL, CE: Kiyo EX, TSV: Syndion-C)- Developing QPT process using a-Si Core to provide advanced structures to internal BUs- Successfully developed Spacer based (TiO2) patterning scheme through QPT for 11nm half pitch with <1.5nm 3σ.

Fremont, CA, US

- Responsible for real time process monitoring of all deposition tools (Cu-In-Ga-Se absorber layer), data analysis, improvements to yield, and tool uptime performance- Worked closely with Engineering/Maintenance groups to identify and resolve hardware/software issues; Evaluated new hardware and monitoring controls to drive product/reliability improvements

Fremont, CA, US

- Customer Technologist Manager (CTM) – Managed UMC etch process technology by actively engaging with customer engineers and local process team to improve existing processes in cost of ownership (COO), yield enhancement, throughput improvement, hardware testing, and collaborated in qualifying new applications- Performed demo projects in R&D lab and at.

Phoenix, Arizona, US

Plasma Etch Process Engineer- Responsible for Oxide etch module overseeing 12 Lam 4520 Oxide etch systems in Class 1 CMOS/BiCMOS Fab- Optimized and monitored critical process parameters utilizing SPC, DOE, FMEA, Lam Station. Set up automation to prevent/eliminate misprocessing. Wrote and trained operators on SOP.- Led a task force of engineering.

Ms, Electrical Engineering

Bs, Microelectronics Engineering