Tim Swensen Email and Phone Number
Tim Swensen work email
- Valid
- Valid
- Valid
- Valid
Tim Swensen personal email
Tim Swensen phone numbers
Product Specialist Engineer for Custom Integrated Circuits Verification team.Former Product Engineer for Analog Fast Spice (AFS)simulator.Previously: 17 years of digital IC design experience in FPGA companies:Embedded SRAM, volatile and non-volatile security fuses, FPGA routing fabric.Designed in processes down through 20nCircuit design, layout floorplanning, SPICE,Verilog RTL, linting, timing closure, formal verification.Granted four U.S. Patents.
Siemens Digital Industries Software
View- Website:
- sw.siemens.com
- Employees:
- 19214
-
Siemens Digital Industries SoftwareSanta Clara, Ca, Us
-
Product SpecialistSiemens Digital Industries Software Jan 2023 - PresentPlano, Texas, UsDriving performance iniatives for AFS XT and Solido SPICE, the Siemens circuit simulators. Serving as the technical expert in customer engagements. Demonstrating the value of our EDA tools to customer success.
-
Senior Product Engineer, Memory VerificationSiemens Digital Industries Software Jan 2021 - Jan 2023Plano, Texas, UsProduct Engineer in Circuit Simulation team. Driving improvements in AFS (SPICE) Simulator for our customers. (This is a continuation of my role at Mentor, which was acquired by Siemens.)
-
Senior Product Engineer, Memory VerificationMentor Graphics Mar 2014 - Jan 2021Wilsonville, Or, UsProduct engineering for Mentor Graphics AFS and AFS Mega. Specializing in embedded SRAM characterization. -
Design Engineer, Senior MtsAltera Sep 2010 - Oct 2013FPGA Configuration and Security• Designed and managed layout for a non-volatile fuse block and AES battery-based key register block for FPGA configuration engine in 20nm process.• Designed, managed layout, wrote test procedure, and carried to tapeout a non-volatile metal fuse test chip in 20nm process. Achieved first-silicon operational success.• Consulted with CAD to develop power domain verification methodology in a multi-supply FPGA using Mentor PERC. Verified power domain integrity of configuration subsystem using this tool.• Verified logical equivalence of RTL Verilog models and custom IP block schematics using Cadence Conformal LEC formal verification tool.• Verified proper coding style and syntax in block level RTL models using Spyglass lint tool.• Performed static timing analysis on volatile and non-volatile fuse blocks using NanoTime.• Ensured timing closure of programming control and Design-for-Testability circuitry.• Interfaced with US Government agencies and DoD contractors to ensure FPGA design security against attack vectors.
-
Staff Design EngineerLattice Semiconductor Jun 1995 - Sep 2010Hillsboro, Oregon, UsFPGA Embedded SRAM, Configuration, Routing Fabric• Designed sense amp, bit line mux, write drivers, output mux and address decoder logic for embedded SRAM blocks within FPGA products. Designed down through 65nm process.• Supervised layout designers in physical design of components for embedded SRAM blocks.• Developed SRAM functional test and speed characterization patterns for use in production.• Verified interface logic between full chip programming circuitry and SRAM block to ensure proper operation of SRAM pre-load and read-back, using Verilog test bench that I developed.• Wrote and verified Verilog behavioral model of entire embedded SRAM block for 65nm FPGA.• Invented a technique for eliminating glitches in SRAM output decoder by exploiting the decoder architecture to feedback existing outputs prior to address transition. US Patent #7,149,129• Invented circuitry for doubling of SRAM data width in pseudo-dual-port mode without doubling the number of write drivers and sense amps. US Patent #7,539,076• Invented an architectural technique for pre-loading all unused, latched routing mux outputs in an FPGA fabric through a novel arrangement of mux control bits in the address space, eliminating floating nodes without adding a pre-load transistor to each mux. US Patent #7,663,401• Invented a circuit topology to ensure limited bit line voltage swing in a dual-port SRAM, reducing the effect of opposite-port operations on read speed. US Patent #8,451,679 -
Graduate Teaching AssistantPurdue University Aug 1990 - May 1995West Lafayette, In, UsClassroom teaching assistant in EE and Mathematics departments.Graded exams, held office hours, lectured, assigned grades(lectured and assigned grades in math dept. courses only). -
Test EngineerAcuson Corporation (Now Siemens Medical) Jul 1987 - Jul 1990Munich, DeMedical diagnostic ultrasound systems. Company was later acquired by Siemens.• Designed test fixtures and automated test software for signal processing circuit boards in medical ultrasound scanner.• Deployed test systems on production floor. Systems used a combination of custom hardware and commercial test instruments under IEEE-488 bus control.• Wrote test specifications and test procedures for signal processing circuit boards.• Trained technicians in circuit test and debug.• Led manufacturing debug efforts for production failures and signal integrity problems.
Tim Swensen Skills
Tim Swensen Education Details
-
Purdue UniversityElectrical Engineering -
Walla Walla UniversityEngineering -- Electrical Concentration
-
Andrews UniversityElectrical Engineering
Frequently Asked Questions about Tim Swensen
What company does Tim Swensen work for?
Tim Swensen works for Siemens Digital Industries Software
What is Tim Swensen's role at the current company?
Tim Swensen's current role is Product Specialist Engineer at Siemens EDA.
What is Tim Swensen's email address?
Tim Swensen's email address is ti****@****tor.com
What is Tim Swensen's direct phone number?
Tim Swensen's direct phone number is +140882*****
What schools did Tim Swensen attend?
Tim Swensen attended Purdue University, Walla Walla University, Andrews University.
What skills is Tim Swensen known for?
Tim Swensen has skills like Fpga, Verilog, Integrated Circuit Design, Embedded Systems, Asic, Timing Closure, Circuit Design, Analog, Debugging, Spice, Semiconductors, Mixed Signal.
Free Chrome Extension
Find emails, phones & company data instantly
Aero Online
Your AI prospecting assistant
Select data to include:
0 records × $0.02 per record
Download 750 million emails and 100 million phone numbers
Access emails and phone numbers of over 750 million business users. Instantly download verified profiles using 20+ filters, including location, job title, company, function, and industry.
Start your free trial