Splunk Architect & Administrator• Architect and administrator to multi-site Splunk deployment of over fifteen central servers, five hundred forwarders, two hundred active users, and 800 GB/day license.• Re-built environment from the ground up to meet Enterprise deployment standards, including clustered indexing and search functions.• On-boarded data from custom application logs, IIS, SQL databases, and scripted API calls (Python, Powershell).• Developed app (XML, CSS) for 24/7 operations monitoring in the NOC. Also built dashboards to provide current and historic views of key performance metrics on critical services.• Deployed and configured Splunk apps: IT Service Intelligence (ITSI), DB-Connect v3, Machine Learning Toolkit, Rapid7 Nexpose, and Redis.• Documented and promoted logging standard for development team to improve the data onboarding process.

Sr. Application Engineer (Dec 2015 - Sept 2017)- Splunk architect and administrator--- Central Splunk infrastructure included over 20 servers (clustered search heads/indexers, deployment server), 400 GB/day license--- 2000 deployed Universal Forwarders in a mixed RedHat Linux and Windows environment- Wrote internal Splunk apps (Python, XML, Javascript, Powershell, SQL, config files) for custom data collection, search commands, parsing, display and analysis--- Included scripted API collection from VMWare AirWatch, JAMF and Cisco Prime- Deployed Splunk IT Service Intelligence (ITSI), DB-Connect v2, add-ons and associated apps for Isilon, NetApp, VMWare, ForeScout CounterACT- Wrote training and presentation materials for internal Splunk users' group--- Training material included a search optimization seminar- Assisted Splunk users with search optimization and dashboard efficiency- Managed consultants for functional improvement and feature changes to their PHI privacy monitoring software- Developed policy, including the structure for user access and approvalField Technician, Healthcare (Dec 2013 - Dec 2015)- Desktop support, phone support- Reported daily to perioperative leadership

Member of the Special Test Equipment (STE) unit.Test Lead, Torpedo Guidance Circuit Boards and Processor Assembly (May 2011 - May 2013):-Developed board test station and high density test interface.---Board test station performed functional test and programming on six digital circuit cards.-Designed and implemented test firmware (VHDL, Xilinx) and test software (LabVIEW) for first article and factory acceptance tests.-Directly supervised two subordinate engineers.-Managed subcontractors, wrote design specifications, performed design validation.-Provided technical guidance to program leadership for contract negotiations.Test Lead, Radar Processor In-Circuit Test (ICT) (April 2010 - April 2011):-Led team of five engineers on development of fixtures and test software for the Agilent i3070 ICT system.---Tested over a dozen analog and digital circuit cards.-Developed JTAG test software (Corelis) to augment ICT.-Performed delivery, installation, validation, and technician training at customer's facility in Taiwan.Firmware Developer, Radar Signal Processor Upgrade (Oct 2009 - March 2010):-Updated the fielded firmware (VHDL, Xilinx).---Addressed stability concerns.---Added interface and clock to support an upcoming product line.Firmware Developer, Sonar Network Interface Board (May 2009 - Sept 2009):-Developed firmware (VHDL, Altera) to mimic sonar communication stream to a network interface card.Hardware Engineer, Radar Signal Processor Circuit Boards and Assembly (July 2008 - April 2009):-Finished the integration and validation of two test station hardware designs.-Completed the test software (LabVIEW) integration and validation following the departure of our software engineer.

TA for Introduction to Digital Circuits. Oversaw laboratory exercises and graded assignments and exams.

TA for Interface Design course. Assisted students in lab with their group project by offering feature and design advice, as well as aiding troubleshoot during integration.

Developed and refined a testing methodology for memory arrays with assistance from senior engineer. Wrote software to support design validation and supported the software with documentation and training. Assisted in debugging and correcting processor layout.