Sr. Semiconductor Packaging Engineer
CurrentA Semiconductor Packaging Engineer with over 15 years of experience in manufacturing process development, mechanical package design and subcontract assembly management.•16 years custom electronic packaging and tactical dewar design of which 9 years for Infrared Focal Plane Arrays operating at cryogenic through room temperatures.• 23 years’ experience in assembly process engineering of hermetic and plastic semiconductor assemblies.• Experience in assembling to MIL-STD 883, MIL-M-38510, MIL-PRF-38534.• Experience includes Class S, Class K and Commercial hermetic assembly.• Experience in assembly related failure analysis of semiconductor components.• Computer literacy in Microsoft DOS and Windows OS’s, Microsoft Office Suite (Visio, Project, etc.), AutoCAD 2D and SolidWorks 3D modeling.• Experienced in the use of Design of Experiments (DOE’S) and Statistical Process Control (SPC).• Experience in electronics component level troubleshooting of automation and electronics equipment.• Active Security Clearance