Tomasz Jackowski Email & Phone Number

Poznań, Woj. Wielkopolskie, Polska

Contributing to Scan and Logic Test parts of Tessent toolset, the leading platform of Design for Testability (DFT) EDA (CAD) software.Daily duties include: -preparing functional specifications for new tool features, -implementing new functionalities (C++, Verilog, Tcl), -thorough testing (incl. flow and interoperability testing with 3rd party tools), -contributing to product documentation, -collaborating with fellow development, QA, application engineers, -supporting internship participants.

Poznań, Wielkopolskie, Poland

Contributing to Scan and Logic Test parts of Tessent toolset, the leading platform of Design for Testability (DFT) EDA (CAD) software.Daily duties included: -preparing functional specifications for new tool features, -implementing new functionalities (C++, Verilog, Tcl), -thorough testing (incl. flow and interoperability testing with 3rd party tools), -contributing to product documentation.Please note, that Siemens Digital Industries Software acquired Mentor Graphics in3/2017.

Poznań, Woj. Wielkopolskie, Polska

Testing new functionalities within Tessent platform. Functional specifications analysis. Preparation and execution of test plans. Automated modifications of regression test base to verify functionality under test.

Poznań, Poland

Preparing test plans, data-driven testing, defects reporting.Stack: Linux, Tcl, shell, Verilog, Makefile.

Master Of Engineering, Electronics And Telecommunications, Aa (With Distinction)

Activities and Societies: 2013 - Spring semester at Bogazici University, Istanbul, Turkey (LLP Erasmus).Speciality: wireless.

Bachelor Of Engineering (B.Eng.), Electronics And Telecommunications, Aa (With Distinction)

Education record