Tony Spagnolia Email & Phone Number

Grain Valley, Missouri, Us

● Manager − Leads and directs team of multidisciplinary Hardware Engineers: Analog Designers, Digital Hardware Designers, FPGA designers, PCB Layout− Coordinates hardware efforts with Systems, Software, Production and Validation Teams− Writes statements of work and directs design efforts with third-party design engineering firms− Manges hardware schedule, leads design architecture decisions and oversees all aspects of designs on 5+ programs● Technical Expert− Alstom World Class Engineer for CPU Component selection, computer architecture design, hardware digital design− Alstom World Class Engineer for FPGA Component Selection, FPGA architecture design, VHDL, SystemVerilog, FPGA validation− Continues to perform Hardware and FPGA designs on high-profile projects● Inventor and Innovator− Owner of multiple patents involving the future of train detection technologies− Attends conferences and industry trainings and performs research to gain expertise in the latest technologies− Creates new business opportunities by drafting proposals and business cases● Educator− Provides technical instruction to Engineers in Digital Design, FPGA Design, Vital Design− Coordinates advanced technical training to team

Saint-Ouen, Fr

● Manager − Leads and directs team of multidisciplinary Hardware Engineers: Analog Designers, Digital Hardware Designers, FPGA designers, PCB Layout− Coordinates hardware efforts with Systems, Software, Production and Validation Teams− Writes statements of work and directs design efforts with third-party design engineering firms− Manges hardware schedule, leads design architecture decisions and oversees all aspects of designs on 5+ programs● Technical Expert− Alstom World Class Engineer for CPU Component selection, computer architecture design, hardware digital design− Alstom World Class Engineer for FPGA Component Selection, FPGA architecture design, VHDL, SystemVerilog, FPGA validation− Continues to perform Hardware and FPGA designs on high-profile projects● Inventor and Innovator− Owner of multiple patents involving the future of train detection technologies− Attends conferences and industry trainings and performs research to gain expertise in the latest technologies− Creates new business opportunities by drafting proposals and business cases● Educator− Provides technical instruction to Engineers in Digital Design, FPGA Design, Vital Design− Coordinates advanced technical training to team● Roadside Interface Module- Lead Hardware Architect\Lead FPGA Engineer− Lead Hardware Engineer for Alstom’s innovation effort to provide a next generation Vital Input Output Interface with the first use case as a Traffic Light Controller for an Autonomous Bus System− Led all aspects of Hardware and FPGA design● Global Data Acquisition Unit- Lead Hardware Architect\Lead FPGA Engineer− Lead Hardware Engineer for Alstom’s innovation effort to update Alstom’s wayside edge device solution to monitor, capture and store predictive maintenance and critical signaling data in all Global Markets by increasing system sampling rates, increasing voltage/current IO ranges and offloading CPU real-time functions to the FPGA− Led all aspects of hardware and FPGA design

Saint-Ouen, Fr

● Alstom CORE Platform- Lead Hardware Architect/Lead FPGA Engineer −Led Alstom’s innovation effort to provide a Common Vital Processor/FPGA platform for global standardization −Led all aspects of design including architecture design, FPGA design, component selection, schematic capture, documentation, requirements, PCB layout, troubleshooting, system integration verification● Next Generation Vital Track Circuit Interface- Lead Hardware Architect\Lead FPGA Engineer −Key team member of Alstom’s innovation effort to provide a next generation Vital Track Circuit Interface to revolutionize the movement of trains across the world −Performed product architecture design, component selection, schematic capture, documentation, troubleshooting, system integration and verification −Led all aspects of FPGA design including VHDL, documentation, requirements, hardware/software troubleshooting, system integration and verification● Data Acquisition Unit- Lead Hardware Architect/Lead FPGA Engineer −Key team member of Alstom’s innovation effort to provide a wayside edge device solution to monitor, capture and store predictive maintenance and critical signaling data −Finalized FPGA Design Effort for the Data Acquisition Unit including finalizing the architecture design, troubleshooting and correcting design errors, performing system integration and verification ● Wayside Server Module- Lead Hardware Architect/Lead FPGA Engineer −Key team member of Alstom’s innovation effort to provide a wayside edge device solution to analyze and process predictive maintenance and critical signaling data −Led FPGA Design Effort including coding, documentation, requirements, troubleshooting, system integration and verification

Saint-Ouen, Fr

● Wireless Island-Lead R&D Engineer −Led Alstom’s R&D effort for the future of wayside train detection technologies −Investigated and tested the following sensor systems: thermopile detectors, thermal cameras, magnetometers, accelerometers, infrared line of sight, proximity, inductive, machine vision, time of flight, LIDAR and RADAR. −Developed the safety and vitality concepts for detection systems utilizing magnetometers, LIDAR and RADAR● UltraCab CPU II Onboard Real Time Clock- Lead Design Engineer −Designed battery backed ultra-low power system to provide Real Time Clock, Calendar, non volatile RAM and watchdog timer for processor supervision.● System Management- National Instruments FPGA/CVS Support Engineer −Supported a pilot program utilizing NI CRIO, Compact Vision System and various sensors for predictive maintenance on switch machines −Utilized force, inductive proximity, machine vision, clevis pin and vibration sensor.

Charlotte, North Carolina, Us

Lead test engineer and lab director for MSP CTCU/CEA satellite control/communications programs-o Program technical expert- Go to engineer for all program design verification efforts, board testing, system-integration, board and system-level troubleshooting, failure investigations, redesign efforts, test software/script development and custom test equipment design.o Test documentation/data expert - Responsible for authoring and revamping 100% (40+) of program test plans/procedures for risk and cycle time reduction. Reviews/analyzes 100% of program test data. o Manages lab workforce of 3+ technicians and multidisciplinary team of 5+ engineers. Trains technicians and engineers for use of special test equipment.o Lead engineer on 12 month program to develop, troubleshoot and successfully integrate test software, custom test equipment and custom certification equipment used for testing flight units.o Lead engineer on 8 month program to design and implement a customer network emulator card for use in a custom processor JTAG differential test interface. Led all efforts including development of drawings, schematics, parts lists, procedures, software development/releases and testing.o Delivered two Engineering Development Units ahead of schedule and one Design Verification Unit on schedule.o Received US Navy Special Programs Coin for excellence demonstrated on the MSP CTCU/CEA programs.o Received Honeywell Gold Bravo Award for driving the early delivery of the MSP CTCU/CEA Engineering units.o Received the 2015 Honeywell Outstanding Engineer Award for leading the ATLO GSE program on-time deliveries.Space Satellite Systems/Inertial Navigation Support Engineer-o Multiple Program Supporter- Able to assist more than 10 space programs part time. Efforts include proposal writing, system requirements review/definition, test equipment design, test plan/procedure development, test equipment troubleshooting and data analysis.

Charlotte, North Carolina, Us

Test manager/technical director for ATLO GSE (ground support equipment) program-o Led all aspects of program over eight month period including system and test equipment development, system FPGA and software redesign, test equipment redesign, system documentation, customer interaction and acceptance test development to deliver two ground support equipment units one month early.Lead test engineer for Digital Data Processor (DDP) satellite control computer program-o Program technical expert- Go to engineer for all requirements verification/troubleshooting/investigations/measurement development regarding DDP power supplies, Wideband SERDES interface and signal characterization.o Program documentation/data expert- Led all program data reviews and authored 100% of formal test documentation and customer deliverable documents: Total of 23 test reports, 16 qualification/acceptance test procedures, 4 End Item Data Packages, 1 verificationrequirements document, 2 design specifications and over 10 standard operating detail procedures.o Delivered two Engineering Development Units, one Qualification Unit, and three Flight Units on timeo Received Aerospace Customer Eagle Award for excellence demonstrated as the lead test engineer on the DDP qualification/flight program.o Received Lockheed Martin Subcontractor High Five Award for driving 3 on time flight unit deliveries on the DDP program.

Burbank, Ca, Us

Team Leader and Hardware Design Engineer on UF IPPD team. Led multidisciplinary team over nine month period to develop two fetmocell identification/location prototypes.

Repaired/Installed electronics in electric bass/guitars and bass/guitar amplifiers.

Gainesville, Fl, Us

Designed variable frequency/amplitude prototypes to implement on next generation models.

Managed budget of $40,000 for over 100 members.Turned around unsatisfactory kitchen by recruiting and hiring a new chef with a healthy mindset and a budget friendly attitude. Held weekly food and budget meetings with chef and financial director. Drafted and provided a healthy menu for nine meals a week for the entire school year.

Bachelor Of Science Cum Laude, Electrical Engineering

High School Diploma; I.B. Diploma, 4.0 Out Of 4.0