With over 17 years of specialized expertise in Mixed Signal and Full-Custom IC Layout Designs, I have spearheaded design initiatives for a wide array of memory IPs and Product chips with custom and compiler flows. In my role as Director of India Operations, I orchestrate the operations of a vibrant design center.Key Highlights:Proficient in critical aspects such as floor planning, full-chip integration, and meticulous tape-out checks.Specialized in the intricate design of various memory types including TCAM, SRAM, and MRAM, along with diverse digital and analog blocks.Pioneered the development of High-Performance, High-Density standard cell libraries, showcasing proficiency in writing compiler codes.Provided guidance and mentorship to layout teams, ensuring the consistent delivery of top-tier layouts that meet rigorous DFM and performance standards. Facilitated fruitful collaborations with renowned foundries in the industry.Strengths:Committed team player with a keen aptitude for problem-solving.Proven track record of consistently achieving milestones within challenging timelines.