I am a Lecturer in Computer Science at the University of St Andrews.I am passionate about compilers (along with simulators, debuggers, linkers, etc), operating systems, virtualisation, and databases.I love everything about compilers, from front-end parsers, middle-stage optimisations and back-end code generation. I especially love the LLVM framework, and I work on a high-performance instruction set simulator where the architecture is generated from a high-level description.I am big fan of signalling on UK railways, and in my spare time, I enjoy model trains, and building electronic circuits. Combining these two interests, I enjoy building circuits to control my model trains.