Tsung-Han (Eric) Tsai Email & Phone Number

Taiwan

台灣 Taiwan 新竹市

Hsinchu County, Taiwan, Taiwan

Hsinchu County/City, Taiwan

◆Integrated circuit design and verification for Ethernet Physical Layer (PHY). --Relevant Project: 802.3 100BASE-TX, 100BASE-T1, 1000BASE-T1, 1000BASE-T, 2.5GBASE-T, 5GBASE-T, and 10GBASE-T. --Tools and Skills: Verilog (RTL coding), Verdi, SystemVerilog.◆ Intellectual Property (IP) integration design and verification applied in switch products. -- Synthesis and timing analysis of IP design. Timing constraint development, validation, clock tree synthesis, and timing closure with Physical Design Team. -- Logical equivalence check, static timing analysis (STA) check, and power analysis. -- Memory IP & BIST circuits simulation and validation.◆ Programmed in assembly language on DSP processors, and utility development.◆ Optimized microprocessor architecture and systems.◆ Worked with system and test engineers to solve CP and FT issues. -- Utilized J750 and V50 machines for ASIC Testing in production test processes.

Taipei City, Taiwan

◎Main Theme: Internet of Things for Healthcare◎Conducted the 1st biomedical Hackathon in Taiwan for 120 participants with different backgrounds across Taiwan◎Collaborated with Delta Electronic, Yonglin Foundation, Garmin, Intel and Brain Rhythm Inc.

Taipei City, Taiwan

◎Arranged lectures and organized class activities ◎Tracked down the latest biomedical development news and analyzed the trend◎Provided necessary mentorship for students to complete the biomedical projects◎Facilitated the student discussions

Master’S Degree, Biomedical Electronic And Bioinformatics, Gpa：3.91/4.3

Activities and Societies: Chief Coordinator of 2015 Biomedical Electronics and Bioinformatics Camp & Biomedical Innovation Hackathon, NTU

Bachelor’S Degree, Electronic Engineering, Grades: 3.87/4

Activities and Societies: Sep. 2011 – Jun. 2014 Teaching Assistant for Calculus, NTUT. Graduated from the electronic department.