Uly Samilo Email & Phone Number

Camarillo, Ca, Us

San Diego, Ca, Us

Member of the Design Consulting Services business unit.Currently providing design, synthesis and DFT services for a Two Point Modulation digital PLL.Involved in the design of a DDR3 Load Reduction/Density Multiplier DIMM chipset in 130nm process. The chipset consists of an enhanced JEDEC compatible DDR3 register and an isolation device that buffers the system data bus from the DIMM data bus. Duties include participation in architecture, DFT, synthesis, formal verification and timing closure on the digital blocks of both chips.Performed synthesis, scan insertion, formal verification and test pattern generation for a industry first single-chip multimode (GSM/GPRS/EDGE/WCDMA/HSPA and TD-SCDMA) RF transceiver used in 3G handsets.

San Diego, Ca, Us

Carlsbad, Ca, Us

Responsible for the design of digital cores and the implementation of a digital flow.

Cambridge, Cambs, Gb

Responsible for the design of digital cores.

Santa Clara, Ca, Us

Senior Design Engineer, CMOS Mixed Signal Design GroupSan DiegoResponsible for the design and development of high speed CMOS products. Involved in product architecture from conception to completion. Duties include generation of the Engineering Architectural Specification and project schedule. Interface with marketing, packaging, test engineering, layout, and product engineering to ensure that all requirements are met and a smooth transition occurs between departments. Design duties involve digital design and verification in the Cadence environment, synthesis and formal verification with Synopsis tools, analog verification with Analog Artist/Spectre, Hspice, Hsim or Ultrasim and perform physical layout when required.

Engineer I, Geophysical Research GroupSan DiegoInvolved in all aspects of the development of oceanographic acoustical instruments from design to finish. Responsible for design, build, and test of Heterodyne transceiver cards. Duties included system level schematic capture, system level board layout, parts procurement, board population, instrument assembly, instrument test/debug and instrument implementation. Tasks associated with design and build included the design of matched impedance tuning networks and the design and build of the transformers utilized in the tuning networks.

Senior Engineering Aid, Space Plasma Physics GroupSan DiegoResponsible for the analysis of theoretical and applied data used in Plasma Physics research. Duties included programming theoretical algorithms in Fortran and C, comparison of generated data versus gathered data, and creating animated presentations of the generated data utilizing the IDL programming language.