Umer Imran is a dedicated and result-oriented VLSI Design Verification engineer with over 4 years of experience specializing in Core and SoC Verification. He currently serves as a Manager/ Senior DV Engineer at 10xEngineers, a pioneering startup dedicated to shaping Pakistan's talent into leaders of RISC-V Design and Verification. His career is marked by a series of achievements, including successful verification planning, robust test bench development, extensive coverage analysis, code and functional coverage closure, and expertise in Die to Die Interface, AMBA Protocols, and DV Infrastructure development.Career Highlights: His career highlights include leading key projects such as the verification of Chiplets interface controller, Main Bus and connecting system, and high-performance out-of-order CPU, achieving exceptional results by improving the overall coverage to >98% that significantly contributed to his team's success and the company's objectives. His expertise includes proficiency in using various EDA tools from different vendors, complementing his hands-on expertise in VLSI verification methodologies.Education: Umer holds a Bachelor of Electrical Engineering (BEE) from the National University of Sciences and Technology (NUST, Islamabad), awarded in 2019.Honors: Umer's dedication to the field of VLSI design verification has been recognized through his sponsorship at the RISC-V Summit being a diversity scholar and various awards, including the Best Performance award from Lampro Mellon