Umesh Khetan Email and Phone Number
Umesh Khetan work email
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14 + years of Experience in Analog Circuit Design that richly comprises of expertise in System level SERDES specs and also have Proximity Sensor IP’s which includes IP’s like CDR, PLL’s, Power Management Blocks, Clock Monitoring Unit (CMU) block, TX block, Phase Interpolator, Data converters, TIA amplifier(SC CKT), Gain stage Amplifier(SC CKT) . Also, can do AMS Verification, Reliability simulations (SOAC, Floating Gate Dynamic Current, and High-Z nodes), Analog DFT, and have good understanding of product level flow from Specification to GDSII.Specialties:Analog/Mixed Signal Design, Analog Design tools like HSpice Smartspice Cadence Spectre, NXP VSTRESS tool, IRUN AMS tool, also have exposure to Programminglanguage like perl Scripting,
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Senior Staff EngineerAviva Links Inc. Nov 2021 - PresentHyderabad, Telangana, IndiaDesign of calibration circuit for xifi/eDP/cphy Tx in TSMC 16nm Finfet TechnologyDesign of Phase Interpolator for xifi/eDP in TSMC 16nm Finfet TechnologyDesign of Serializer for xifi/eDP/cphy/dphy in TSMC 16nm FinFet TechnologyDesign of De-Serializer for xifi/eDP/cphy/dphy in TSMC 16nm FinFet TechnologyDone Top-Level AMS verification for CDR(clock and Data Recovery) in TSMC 16nm FinFet TechnologyModeling of MIPI c-phy phy Tx/Rx -
Senior Staff EngineerAms Osram Nov 2019 - Oct 2021Hyderabad, Telangana, IndiaDesign of a Proximity Sensor receiver in TSMC 180nm TechnologyDesign of two stageOPAMP in TSMC 180nm Technology -
Lead EngineerNxp Semiconductors Apr 2018 - Nov 2019Hyderabad, Telangana, India100BASE-TX Top level VerificationVSTRESS AnalysisANALOG DFTDesign of 6-Bit Pipelined ADC for 10/100b reciever in TSMC 40nm Technology -
Analog Design EngineerOmniphy India Private Limited Oct 2012 - Mar 2019Hyderabad, Telangana, IndiaDesigned an Analog Ring Oscillator based PLL in UMC 55nm TechnologyDesigned a Fractional –N Ring oscillator based Analog PLL in TSMC 28nm HPM Technology:Designed an PI for CDR application at 6.25GHz in TSMC 28nm HPM TechnologyDesigned an Termination Calibration block for 50 Ohms termination in TSMC 28nm HPCP TechnologyDesigned a Cascade Linear regulator circuit in TSMC 28nm Technology:Designed an Tx for PCIE GEN -2 in TSMC 28nm HPCP TechnologyDesigned an LVDS Receiver for Reference clock generation -
Member Of Technical StaffQualcore Logic Sep 2009 - Oct 2012Hyderabad, Telangana, IndiaWorked as an analog design engineer.Design of PMIC blocks like Current Mode and Voltage mode Bandgap Referenes LDO's,POR,BOR,etc. Wroked in TSMC 65/40nm, UMC 65nm. -
Graduate Student InternshipQualcore Logic Mar 2009 - Aug 2009Desinged an Emebedded Voltage Regulator which consists of Bandgap Reference Voltage Regaultor and POR in UMC 65nm Technology.
Umesh Khetan Education Details
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Mahatma Gandhi Institute Of Technology GandipetElectrical And Electronics Engineering
Frequently Asked Questions about Umesh Khetan
What company does Umesh Khetan work for?
Umesh Khetan works for Aviva Links Inc.
What is Umesh Khetan's role at the current company?
Umesh Khetan's current role is ANALOG/MIXED SIGNAL CIRCUIT DESIGNER with 15 years of experience.
What is Umesh Khetan's email address?
Umesh Khetan's email address is um****@****ail.com
What schools did Umesh Khetan attend?
Umesh Khetan attended International Institute Of Information Technology Hyderabad (Iiith), Mahatma Gandhi Institute Of Technology Gandipet.
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