Usman Qadir Email & Phone Number

Barcelona, Catalonia, Spain

Lahore, Punjab, Pakistan

💥 Verification of FPGA-Fabric(10x8/82x68/104x68)💥 Developed the UVM-based VIP of DSP block and validate it’s functionalitywith bitstream simulation using Raptor

Lahore, Punjab, Pakistan

💥SoC-Verification of PUFcc-Security IP💥Unit-level and SoC-Verification of Preload & Fabric Controller Block💥ECC memory mapping support added for DDR4 in SoC TB and verified it’s functionality using C & UVM tests

Lahore, Punjab, Pakistan

💥Functional coverage closure of eMMC IP💥Verification of Synopsys-I2C IP on RISCV-based SoC

Lahore, Punjab, Pakistan

💥 Working in team for extension of Torture ISA tester with RISC-V Vector ext. (v0.9)💥 Worked as team lead for designing of direct mapped DCache using System Verilog and its integration with SweRV-EH1 core designed by Western Digital💥 Led dynamic team for design verification project of Wishbone protocol using Synopsis VCS💥 Designed 3 stage pipelined processor using Chisel, single cycle RISCV based processor using Verilog HDL and synthesizable 10 x 10 Matrix Multiplier using Verilog HDL

Mianwali District, Punjab, Pakistan

💥 Amicably helped students to implement their theoretical knowledge into practical work 💥 Assessed student’s lab tasks, lab exams, course works and assignments💥 Handled operation, maintenance & inventory management of equipment and consumables💥 Assisted in supervising students in their semester and final year project💥 Provided assistance in resolving issues and solving problems in manufacturing, construction, research and development, inspection and maintenance

Master'S Degree, Electrical And Electronics Engineering

Bachelor'S Degree, Electrical And Electronics Engineering