Design and Implement hardware/firmware/software solutions in communications systems for military and civilian avionic systems (IFF - Identification Friend Or Foe, Mode5/4/SiF/S, TCAS, TACAN, ADS-B) from system modeling to FPGA/DSP implementation. Serve various roles as FPGA engineer & DSP/System Designer to develop products. Technically lead a development team to translate and decompose high-level requirements into details suitable for hardware design, specifications and development and define system, interfaces, and circuit's requirements for implementation of FPGA, CPUs, DSPs, power, analog and data acquisition circuits and systems into customized avionic systems. Execute designs of efficient FPGA architectures and provide technical knowledge to cross-functional team members.   Verify functionality and performance against requirements, via simulation and lab testing to ensure that technical problems are resolved in a timely manner.Detail-focused team player with extensive experience and demonstrated success in all phases of product development, from system requirements, algorithm development, and circuit design to layout implementation. Deep knowledge and experience in hardware implementation; committed to successful product development under budget and on schedule. Resolve issues encountered in design and implementation phases.

Contributed innovative solutions in wireless and optical communications from signal processing algorithm development to digital / mixed-signal circuit implementation. Served various roles as DSP system engineer, digital circuit designer, and back-end engineer to turn ideas into prototypes / products.- Digital / Mixed Signal ASIC Design for Internet-of-Things (IoT) Applications- Signal Processing and Digital / Mixed-Signal ASIC Design / Integration for High-Speed Data Conversion (Sigma-Delta ADC & Flash ADC / DAC)- Signal Processing and Digital ASIC Design for Wireless / Data Communication- Signal Processing for Coherent Optical Communication- Signal Processing for Non-Coherent Optical Communication

Design and Verification of System-on-a-chip Network Transport Engines• Led verification team to develop test plans to verify network processor chips (TDAT / TADM) capable of handling ATM, HDLC, PPP, SDL traffic either on SONET / SDH or directly over fiber and test chips in lab.System and 16-CAP Transceiver Design for Switched Digital Video System (SDV 2.0)• Regressed from algorithms to transceiver architectures for blind startup and adaptive equalization with on-chip DSP1627 processor to combat RFI / FEXT / NEXT over existing twisted pairs, enabling 51.84Mbps transmission.