Vani S Email and Phone Number

I have been working in the field of DFT design and implementation till date. Own complete DFT architecture, DFT RTL generation, IO test strategy and Memory test.Have good knowledge in Synthesis, LEC, Scan Insertion and STA constraints.Gaining expertise in post silicon debug and support. Learning on mixed signal DFT. In addition to this have worked on Spyglass DFT, Low Power ATPG, IDDQ Diagnostics, Tessent Diagnostics and Cell Aware ATPG.