Van Le Email & Phone Number

United States

Santa Clara, CA, US

Santa Clara, CA, US

• Worked with cross-functional team from EPI, Process Integration, Device, Technology, Quality, Reliability, Apps, Marketing, and Supply Chain to build, test, characterize, and qualify our 700V and 1200V family of.
• Led the development of a JMP data processing tool that quickly create yield reports, charts, wafer maps, variants yield table and trained the yield team on how to use it.
• Helped to improve our manufacturability and yield, which resulted in yield greater than 90% from less than 20%.
• Successfully got our 700V 1Ω part to max out the ESD tester and pass at 8kV.
• Executed various Quals on our 700V 1Ω part and got it to pass HTGB, IOL, DHTOL, bHAST, and all the various Package Qual (i.e. Temp Cycle, HTSL, etc.).
• Developed a full production suite of tests on the Keysight B1506A Power Device Analyzer for bench characterization.

Itasca, Illinois, US

• Joined as part of the Audience acquisition. Collaborated with cross-functional team to integrate Audience’s Operations processes (i.e. fab, assembly, sort, test, BOM routing, NPI planning, Qualification, and MFG.
• Released Knowles first Audio Edge Processor to Production for both a top tier1 mobile customer and a top tier1 social network customer. o Designed die level RDL to bring bond pads to all four sides so die could be.
• Analyzed WAT and yield data and resolved a SRAM leakage issue with FA that stabilized the memory yield and increased the overall yield by 11%.
• Root caused a tester PMU glitch issue that caused a random eFuse bit to be blown by confirming the blown bit with delayering and SEM.

Mountain View, CA, US

• Established and implemented processes for NPI bring-up, debug, test characterization, qualification, and production release to multiple OSATs. Built close relationships with key contacts at fab foundries, CMs and OSATs.
• First engineer in Operations covering product, test, and qualification roles and released Audience first in-house audio processor design to Production that sold 60+ million units to a top tier American cell phone.
• Released and supported 3 generations of audio processors and 2 generations of CODECs to the largest Korean cell phone manufacturer. o Root caused WLCSP RMA units that failed due to sidewall cracks with FA, which lead.
• Wrote the Test, Characterization, Reliability and Package Qualification plans for 8 products and successfully qualified them all for high-volume Production.

CH

• Test program development on ATE ( (Verigy 93K & Credence Quartet) for Digital & Mixed-Signal ICs
• Hardware design to test Digital & Mixed-Signal ICs on ATE
• C/C++
• UNIX, LINUX, Windows, & DOS
• Test Cost Reduction
• Quality & Yield Improvement

Eindhoven, Noord-Brabant, NL

• Note: NXP is a spin-off from Philips Semiconductors.
• Hardware Design
• Test Program Development
• Debug & Characterization
• Quality & Yield Improvement
• Release New Products to Manufacturing

Eindhoven, Noord-Brabant, NL

• Key areas of responsibility
• Test program and hardware development of assigned products from proto to production. Product types include Digital & Mixed-Signal ASIC; ARM cores, PLL, Flash, LDO, FM, Bluetooth, Baseband, RF, USB, UWB, PMU, Crystal.
• Support New Product Introduction (NPI) to manufacturing.
• Wafer sort and final test low yield analysis and improvements of assigned products.
• Improve product quality through customer returns Level I analysis (i.e. RMAs) and customer product problem resolution.
• Promote and implement cost reduction measures of assigned products improving product margin to target cost objectives.

• Key areas of responsibility
• Coordinate with foundries and test vendors in test program correlation and qualification.
• Release production test programs at offshore test vendors.
• Generate various processes/specifications needed to support product in production.
• Collaborate with internal engineering teams to drive and resolve process, test and customer issues.
• Identify major failure modes, analyze fail signatures, and propose process/test changes to enhance yield.

Eindhoven, Noord-Brabant, NL

• Note: VLSI was acquired by Philips.Achievements:
• Delivered multiple ASICs to a company in Cupertino under an iconic founder, including a ramp up from prototype to 1 million units shipped in 90 days. This helped the company delivered its products to the consumers on.
• Analyzed PCM data from FAB and tightened process parameters to help get higher speed chips for the company in Cupertino. This increased revenue and profit margin since these chips have higher ASP.
• Qualified and improved 0.2um process for foundry FABs.
• Collaborated with Process Engineers from FAB to qualify a new process flow when passivation cracking was found in the 0.35um process. It increased the yield by 10% for all products on this process.
• Discovered an incorrect old I/O library used in the META chip design and alerted the cell development group of the problem. This saved about $1 Mil dollars from creating a useless mask set.

Education record

Bs, Electrical & Electronic Engineering