Hello, I am Varun Kumar, an aspiring Design and Verification Engineer actively seeking opportunities in the VLSI field.o Achieved a good rank in the GATE exam, demonstrating my technical acumen and problem-solving skills.o Hands-on experience in Verilog, SystemVerilog, and UVM.o Skilled in using EDA tools like Modelsim and QuestaSim.o Basic understanding of protocols like APB and AHB.Skill set:• Digital Design• Verilog• SystemVerilog• RTL Coding• Functional Verification• Testbench Development• Design Verification• EDA Tools: Modelsim, QuestaSim, EDA Playground• Protocols: APB, AXI• Editor Tools: GVimProjects:• Developed a memory testbench using Verilog, SystemVerilog, and UVM.• Interrupt controller.• Designed synchronous and asynchronous FIFO testbenches using verilog.