Vasant Raghavan Email & Phone Number

Carrollton, Texas

Designed, developed, and tested hardware. Worked through all phases of the product development cycle from initial concept to production and beyond. Interfaced with several groups supporting engineering in order to complete the project and meet the needs of the customer. Designed and tested a SONET based OC-12 optical line unit. Tightly constrained placement and routing to fit this onto a PCB 2U high.  Performed signal integrity testing on the LVDS signals running up to 622Mb/s.  Tested and debugged Xilinx XC95288XL CPLD and ALTERA Stratix FPGA. Detecting and fixing errors early. Expedited the selection and testing of 2nd source OC-48 & OC-12 SFP optical modules so that the change in the factory would be seamless and in turn save the company time and money. Some of the parameters tested were center wavelength, spectral width, side mode suppression, extinction ratio, jitter, return loss, and dispersion.

Managed a team of six to ten technicians. Acted as a liaison between the technicians, clients, sales, telecom, and the help desk. Oversaw all installations of Care360 internet based systems and bridges as well as all problem tickets for these products.  Prioritized, delegated, and scheduled all installs and service calls in the Western Region in such a way that productivity was maximized, while turn around time and travel expenses were minimized.  Provided technical assistance and troubleshooting advice to field technicians with problems at the installations or service tickets, which increased productivity.

Contributed to circuit design, schematic capture and layout, circuit test and debugging, and part procurement during the entire product cycle of FLASH600.  Developed diagnostic software (testware) utilizing C. Added functions in testware to pinpoint hardware faults to one local component failure or group of components. Reducing testing time.  Designed, laid out, and tested a 25A switching power supply used in several cards of the FLASH600 platform, including sequencing circuitry, which converted –48V to 3.3V, 2.5V, and 1.8V. Designed, laid out, and tested a debug module, which provided 10/100 Base-T Ethernet, RS232, JTAG, and reset interfaces to a LAN card. Significantly increasing the ability to debug the LAN card and sped up the design cycle of this project.  Conducted test and debug of FPGA running at 100MHz on a Xilinx Virtex 200PQFP240. By debugging and using this FPGA the budget for this project was kept on track.