Vikas Chandra Email & Phone Number

Menlo Park, Ca, Us

Leading an AI applied research and engineering organization at Meta Reality Labs responsible for developing multimodal AI technologies, generative AI as well as on-device LLM and vision-language models. This involves working with a large cross functional team of AI research scientist, SW engineers and product managers to enable the AI use cases in our products. Our work cuts across the full ML stack - algorithms, model architecture, model optimization and deployment. Work has resulted in several new product features as well as research publications in top-tier AI conferences (NeurIPS, ICLR, CVPR, ICML, ICCV, AAAI, Interspeech, ICASSP,...), and 30+ filed patents.We are hiring exceptional AI researchers and engineers - If you want to build the state-of-the-art AI technology stack for the metaverse, send me a note.Selected recent publications: https://v-chandra.github.io/publications/

Small angel investments in disruptive AI startups. I invest in early stage start-ups where I see status quo disruption. Recent investments include Yellow.ai (conversational AI platform), Veza (data security platform), Raga AI (edge AI observability platform), gradCapital (as LP).

Cambridge, Cambs, Gb

Worked in a leadership role in the core ML technology team building efficient machine learning and deep learning solutions for a wide range of applications. I led research efforts on variety of topics ranging from optimized ML kernels to system aware optimized neural network architecture to energy efficient ML processor architecture. Authored 50+ research publications and 30+ US and international patents. I also served on the internal patent review committee at Arm.

Stanford, Ca, Us

Taught EE213 in the Spring quarters. EE213 is a fundamental class which teaches how to build efficient digital systems. This class has been taught by Prof. Mark Horowitz in the past and is typically taken by senior undergrads and grad students.

Stanford, Ca, Us

Visiting scholar at Stanford EE department. Responsibility includes mentoring Ph.D. students and collaborating on relevant research topics. Published multiple research papers in leading conferences.

Santa Clara, Ca, Us

FPGA fabric design for space-time architecture.

Santa Clara, California, Us

Asynchronous logic research and implementation for a communication centric product.

Armonk, New York, Ny, Us

Research into design of low power SoC interconnect architecture based on voltage and frequency islands.

Geneva, Switzerland, Ch

Worked on high performance and low power ASIC libraries.

Ph.D., Computer Engineering

Ms, Computer Engineering

B.E. (Hons.), Instrumentation Engineering