Veeresh H Email and Phone Number
Veeresh H is a Physical Design Engineer at Marvell Semiconductor.
Marvell Semiconductor
View- Website:
- marvell.com
- Employees:
- 6147
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Physical Design EngineerMarvell SemiconductorBengaluru, Ka, In -
Physical Design EngineerMarvell Semiconductor Nov 2019 - PresentBengaluru Area, India -
Asic Physical Design EngineerGlobalfoundries Aug 2017 - Nov 2019Bengaluru Area, IndiaI have the experience of taping out high performance chip in lower technology node working as a physical design engineer at block level which involves efficient floorplanning, placement , clock tree synthesis, timing optimization, routing, timing closure and physical verification closure. -
InternIntel Corporation Jul 2016 - Jun 2017Banglore, IndiaI have worked on Analog circuit and layout design. I have designed level shifter block. The design includes both the circuit and layout design of the level shifter.I have worked on modelling the sub-blocks of Thermal sensor using Verilog-A modelling language. The blocks i modeled includes sense stage and sigma-delta ADC stage.
Veeresh H Education Details
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Vlsi Design And Embedded Systems
Frequently Asked Questions about Veeresh H
What company does Veeresh H work for?
Veeresh H works for Marvell Semiconductor
What is Veeresh H's role at the current company?
Veeresh H's current role is Physical Design Engineer.
What schools did Veeresh H attend?
Veeresh H attended R. V. College Of Engineering, Bangalore.
Who are Veeresh H's colleagues?
Veeresh H's colleagues are Erez Menahem, Jessie Tsao, Paul Tran, Bharath R, 王勇强, John Bannister, Nagabhushan Kurapati.
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