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Vignesh R. Email & Phone Number

Design Verification Engineer at Apple
Location: Cupertino, California, United States 9 work roles 4 schools
2 phones found area 765 LinkedIn matched
✓ Verified May 2026 4 data sources Profile completeness 100%

Contact Signals · 2 phones

Direct phone (765) ***-****
LinkedIn Profile matched
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Current company
Role
Design Verification Engineer
Location
Cupertino, California, United States

Who is Vignesh R.? Overview

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Quick answer

Vignesh R. is listed as Design Verification Engineer at Apple, based in Cupertino, California, United States. AeroLeads shows phone signal with area code 765 and a matched LinkedIn profile for Vignesh R..

Vignesh R. previously worked as Graduate Teaching Assistant at Purdue University and Graduate Technical Intern at Intel Corporation. Vignesh R. holds Master’S Degree, Electrical And Computer Engineering from Purdue University.

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Apple

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Profile bio

About Vignesh R.

MS in Electrical and Computer Engineering at Purdue (2016 - 2018)BTech in Electrical and Electronics Engineering at NIT-Trichy (2009 - 2013)~3 years work experience in Design Verification at Broadcom, STMicroelectronics.Last Updated : 20th June 2018.

Listed skills include Mathematics, Computer Science, and Semiconductors.

Current workplace

Vignesh R.'s current company

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Apple
Apple
Design Verification Engineer
AeroLeads page
9 roles

Vignesh R. work experience

A career timeline built from the work history available for this profile.

Design Verification Engineer

Current

Cupertino, California, US

Jun 2018 - Present

Graduate Teaching Assistant

West Lafayette, IN, US

Lab Instructor for ECE270 - Intro to Digital System Design course.Key Responsibilities -- Manage two 3hr Lab sessions every week (30+ students per session).- Hold office hours (3hrs) every week to clarify doubts, verify pre-labs and makeup labs.- Proctor Exams and weekly Quizzes.- Overview of the Lab Experiment (Presentation).- Coordinate with the UTAs for.

Graduate Technical Intern

Santa Clara, California, US

Designing and Integrating key features and implementing bug fixes in next generation ECC IP.

May 2017 - Aug 2017

Grader

West Lafayette, IN, US

Grading weekly Homeworks for ECE 202 Linear Circuit Analysis II (~100 students).

Jan 2017 - Apr 2017

Grader

West Lafayette, IN, US

Grading weekly Homeworks for ECE 202 Linear Circuit Analysis II (~60 students).

Oct 2016 - Dec 2016

Engineer, Staff I - Ic Design

Palo Alto, California, US

  • SoC Verification of Proprietary Timer IP.
  • Ramp-up on IP features from IP Specification.
  • Identify Integration scenarios to verify.
  • Update Test Plan and Review with Designer.
  • Responsible for Regression Clean up on IP.
  • File + Track Bugs and Verify Bug fixes on IP/FE.SoC Verification of Display Controller Subsystem.
Jul 2015 - Jul 2016

Design Engineer

Geneva, Switzerland, CH

  • CUT- ISimplest Automotive SoC for Park Assist Applications.SoC Verification of Device Censorship and Security IPs.
  • Overview on Automotive SoC and TB Environment.
  • Ramp-up on IP features from IP block guide.
  • Update Verification plan for IP in Enterprise Planner.
  • Clean up Make errors and Link errors in regression.
  • Debug + Track regression failures with FE/TB Release.
Sep 2014 - Jun 2015

Engineer, Ic Design

Palo Alto, California, US

  • TAPEOUT- I
  • C-based Verification of IP Integration in Subsystem and SoC.
  • Register Read-Only Regression Cleanup.
  • Toggle Coverage Analysis in IMC tool.
  • Connectivity Checks in JASPER.
  • Gate Level Simulations Debug in Unit-delay Power and Ground Netlist.
Aug 2013 - Jul 2014

Summer Internship

Bengaluru, Karnataka, IN

  • Active SIM based Call Log Module.
May 2012 - Jun 2012
4 education records

Vignesh R. education

Master’S Degree, Electrical And Computer Engineering

Purdue University

Bachelor Of Technology (B.Tech.), Electrical And Electronics Engineering

National Institute Of Technology, Tiruchirappalli

All India Senior School Certificate Examination, 2009, Mathematics And Computer Science

Kendriya Vidyalaya Minambakkam

All India Secondary School Examination, 2007

Kendriya Vidyalaya Minambakkam
FAQ

Frequently asked questions about Vignesh R.

Quick answers generated from the profile data available on this page.

What company does Vignesh R. work for?

Vignesh R. works for Apple.

What is Vignesh R.'s role at Apple?

Vignesh R. is listed as Design Verification Engineer at Apple.

What is Vignesh R.'s phone number?

AeroLeads has found 2 phone signal(s) with area code 765 for Vignesh R. at Apple.

Where is Vignesh R. based?

Vignesh R. is based in Cupertino, California, United States while working with Apple.

What companies has Vignesh R. worked for?

Vignesh R. has worked for Apple, Purdue University, Intel Corporation, Broadcom, and Stmicroelectronics.

How can I contact Vignesh R.?

You can use AeroLeads to view verified contact signals for Vignesh R. at Apple, including work email, phone, and LinkedIn data when available.

What schools did Vignesh R. attend?

Vignesh R. holds Master’S Degree, Electrical And Computer Engineering from Purdue University.

What skills is Vignesh R. known for?

Vignesh R. is listed with skills including Mathematics, Computer Science, and Semiconductors.

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